dtb: amd: Fix DMA ranges in device tree

Fix DMA ranges of smb0 and pcie0 nodes in AMD Seattle SOC.

Signed-off-by: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>
Signed-off-by: Olof Johansson <olof@lixom.net>

diff --git a/arch/arm64/boot/dts/amd/amd-seattle-soc.dtsi b/arch/arm64/boot/dts/amd/amd-seattle-soc.dtsi
index fdd0c967138edfdea9882e76b8a96a3d5357bdc2..5c73117f5c7bf875651b5c1403a04448edf573e1 100644 (file)
--- a/arch/arm64/boot/dts/amd/amd-seattle-soc.dtsi
+++ b/arch/arm64/boot/dts/amd/amd-seattle-soc.dtsi
@@ -55,8 +55,12 @@ smb0: smb {
                #size-cells = <2>;
                ranges;
 
-               /* DDR range is 40-bit addressing */
-               dma-ranges = <0x80 0x0 0x80 0x0 0x7f 0xffffffff>;
+               /*
+                * dma-ranges is 40-bit address space containing:
+                * - GICv2m MSI register is at 0xe0080000
+                * - DRAM range [0x8000000000 to 0xffffffffff]
+                */
+               dma-ranges = <0x0 0x0 0x0 0x0 0x100 0x0>;
 
                /include/ "amd-seattle-clks.dtsi"
 
@@ -159,7 +163,7 @@ pcie0: pcie@f0000000 {
                                <0x1000 0x0 0x0 0x4 &gic0 0x0 0x0 0x0 0x123 0x1>;
 
                        dma-coherent;
-                       dma-ranges = <0x43000000 0x80 0x0 0x80 0x0 0x7f 0xffffffff>;
+                       dma-ranges = <0x43000000 0x0 0x0 0x0 0x0 0x100 0x0>;
                        ranges =
                                /* I/O Memory (size=64K) */
                                <0x01000000 0x00 0x00000000 0x00 0xefff0000 0x00 0x00010000>,