ARM: dts: STi: Update clocks node location

Move:
 _ arm_periph_clk node as child of clockgen-a9@92b0000 node
 _ clk_m_a9_ext2f_div2 node as child of clk_s_c0_flexgen node
 _ clk-tmdsout-hdmi node outiside soc node

This allows to fix the following warnings when compiling
dtb with W=1 option :

arch/arm/boot/dts/stih410-b2120.dtb: Warning (simple_bus_reg):
Node /clocks/clk-m-a9-periphs missing or empty reg/ranges property
arch/arm/boot/dts/stih410-b2120.dtb: Warning (simple_bus_reg):
Node /clocks/clk-m-a9-ext2f-div2s missing or empty reg/ranges property
arch/arm/boot/dts/stih410-b2120.dtb: Warning (simple_bus_reg):
Node /clocks/clk-tmdsout-hdmi missing or empty reg/ranges property
arch/arm/boot/dts/stih410-b2120.dtb: Warning (simple_bus_reg):
Node /clocks/clk-tmdsout-hdmi missing or empty reg/ranges property

arch/arm/boot/dts/stih410-b2260.dtb: Warning (simple_bus_reg):
Node /clocks/clk-m-a9-periphs missing or empty reg/ranges property
arch/arm/boot/dts/stih410-b2260.dtb: Warning (simple_bus_reg):
Node /clocks/clk-m-a9-ext2f-div2s missing or empty reg/ranges property
arch/arm/boot/dts/stih410-b2260.dtb: Warning (simple_bus_reg):
Node /clocks/clk-tmdsout-hdmi missing or empty reg/ranges property
arch/arm/boot/dts/stih410-b2260.dtb: Warning (simple_bus_reg):
Node /clocks/clk-tmdsout-hdmi missing or empty reg/ranges property

arch/arm/boot/dts/stih418-b2199.dtb: Warning (simple_bus_reg):
Node /clocks/clk-m-a9-periphs missing or empty reg/ranges property
arch/arm/boot/dts/stih418-b2199.dtb: Warning (simple_bus_reg):
Node /clocks/clk-m-a9-ext2f-div2s missing or empty reg/ranges property
arch/arm/boot/dts/stih418-b2199.dtb: Warning (simple_bus_reg):
Node /clocks/clk-tmdsout-hdmi missing or empty reg/ranges property
arch/arm/boot/dts/stih418-b2199.dtb: Warning (simple_bus_reg):
Node /clocks/clk-tmdsout-hdmi missing or empty reg/ranges property

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>

diff --git a/arch/arm/boot/dts/stih407-clock.dtsi b/arch/arm/boot/dts/stih407-clock.dtsi
index b882dcf3a649c3ae6e82bf7dc24993056d0945df..084c02926f33658f6a0254db188b9d870965aca3 100644 (file)
--- a/arch/arm/boot/dts/stih407-clock.dtsi
+++ b/arch/arm/boot/dts/stih407-clock.dtsi
@@ -7,32 +7,26 @@
  */
 #include <dt-bindings/clock/stih407-clks.h>
 / {
+       /*
+        * Fixed 30MHz oscillator inputs to SoC
+        */
+       clk_sysin: clk-sysin {
+               #clock-cells = <0>;
+               compatible = "fixed-clock";
+               clock-frequency = <30000000>;
+       };
+
+       clk_tmdsout_hdmi: clk-tmdsout-hdmi {
+               #clock-cells = <0>;
+               compatible = "fixed-clock";
+               clock-frequency = <0>;
+       };
+
        clocks {
                #address-cells = <1>;
                #size-cells = <1>;
                ranges;
 
-               /*
-                * Fixed 30MHz oscillator inputs to SoC
-                */
-               clk_sysin: clk-sysin {
-                       #clock-cells = <0>;
-                       compatible = "fixed-clock";
-                       clock-frequency = <30000000>;
-               };
-
-               /*
-                * ARM Peripheral clock for timers
-                */
-               arm_periph_clk: clk-m-a9-periphs {
-                       #clock-cells = <0>;
-                       compatible = "fixed-factor-clock";
-
-                       clocks = <&clk_m_a9>;
-                       clock-div = <2>;
-                       clock-mult = <1>;
-               };
-
                /*
                 * A9 PLL.
                 */
@@ -62,21 +56,19 @@ clk_m_a9: clk-m-a9@92b0000 {
                                 <&clockgen_a9_pll 0>,
                                 <&clk_s_c0_flexgen 13>,
                                 <&clk_m_a9_ext2f_div2>;
-               };
-
-               /*
-                * ARM Peripheral clock for timers
-                */
-               clk_m_a9_ext2f_div2: clk-m-a9-ext2f-div2s {
-                       #clock-cells = <0>;
-                       compatible = "fixed-factor-clock";
 
-                       clocks = <&clk_s_c0_flexgen 13>;
 
-                       clock-output-names = "clk-m-a9-ext2f-div2";
+                       /*
+                        * ARM Peripheral clock for timers
+                        */
+                       arm_periph_clk: clk-m-a9-periphs {
+                               #clock-cells = <0>;
+                               compatible = "fixed-factor-clock";
 
-                       clock-div = <2>;
-                       clock-mult = <1>;
+                               clocks = <&clk_m_a9>;
+                               clock-div = <2>;
+                               clock-mult = <1>;
+                       };
                };
 
                /*
@@ -204,6 +196,21 @@ clk_s_c0_flexgen: clk-s-c0-flexgen {
                                                 <CLK_EXT2F_A9>,
                                                 <CLK_ICN_LMI>,
                                                 <CLK_ICN_SBC>;
+
+                               /*
+                                * ARM Peripheral clock for timers
+                                */
+                               clk_m_a9_ext2f_div2: clk-m-a9-ext2f-div2s {
+                                       #clock-cells = <0>;
+                                       compatible = "fixed-factor-clock";
+
+                                       clocks = <&clk_s_c0_flexgen 13>;
+
+                                       clock-output-names = "clk-m-a9-ext2f-div2";
+
+                                       clock-div = <2>;
+                                       clock-mult = <1>;
+                               };
                        };
                };
 
@@ -254,12 +261,6 @@ clk_s_d2_quadfs: clk-s-d2-quadfs@9106000 {
                                             "clk-s-d2-fs0-ch3";
                };
 
-               clk_tmdsout_hdmi: clk-tmdsout-hdmi {
-                       #clock-cells = <0>;
-                       compatible = "fixed-clock";
-                       clock-frequency = <0>;
-               };
-
                clockgen-d2@9106000 {
                        compatible = "st,clkgen-c32";
                        reg = <0x9106000 0x1000>;

diff --git a/arch/arm/boot/dts/stih410-clock.dtsi b/arch/arm/boot/dts/stih410-clock.dtsi
index 4df1b2187aa236eceb2d699a885108447c8eb4ca..b2c814f1261a97a41ff3d35ce10f933483417320 100644 (file)
--- a/arch/arm/boot/dts/stih410-clock.dtsi
+++ b/arch/arm/boot/dts/stih410-clock.dtsi
@@ -7,6 +7,22 @@
  */
 #include <dt-bindings/clock/stih410-clks.h>
 / {
+       /*
+        * Fixed 30MHz oscillator inputs to SoC
+        */
+       clk_sysin: clk-sysin {
+               #clock-cells = <0>;
+               compatible = "fixed-clock";
+               clock-frequency = <30000000>;
+               clock-output-names = "CLK_SYSIN";
+       };
+
+       clk_tmdsout_hdmi: clk-tmdsout-hdmi {
+               #clock-cells = <0>;
+               compatible = "fixed-clock";
+               clock-frequency = <0>;
+       };
+
        clocks {
                #address-cells = <1>;
                #size-cells = <1>;
@@ -14,27 +30,6 @@ clocks {
 
                compatible = "st,stih410-clk", "simple-bus";
 
-               /*
-                * Fixed 30MHz oscillator inputs to SoC
-                */
-               clk_sysin: clk-sysin {
-                       #clock-cells = <0>;
-                       compatible = "fixed-clock";
-                       clock-frequency = <30000000>;
-                       clock-output-names = "CLK_SYSIN";
-               };
-
-               /*
-                * ARM Peripheral clock for timers
-                */
-               arm_periph_clk: clk-m-a9-periphs {
-                       #clock-cells = <0>;
-                       compatible = "fixed-factor-clock";
-                       clocks = <&clk_m_a9>;
-                       clock-div = <2>;
-                       clock-mult = <1>;
-               };
-
                /*
                 * A9 PLL.
                 */
@@ -64,21 +59,16 @@ clk_m_a9: clk-m-a9@92b0000 {
                                 <&clockgen_a9_pll 0>,
                                 <&clk_s_c0_flexgen 13>,
                                 <&clk_m_a9_ext2f_div2>;
-               };
-
-               /*
-                * ARM Peripheral clock for timers
-                */
-               clk_m_a9_ext2f_div2: clk-m-a9-ext2f-div2s {
-                       #clock-cells = <0>;
-                       compatible = "fixed-factor-clock";
-
-                       clocks = <&clk_s_c0_flexgen 13>;
-
-                       clock-output-names = "clk-m-a9-ext2f-div2";
-
-                       clock-div = <2>;
-                       clock-mult = <1>;
+                       /*
+                        * ARM Peripheral clock for timers
+                        */
+                       arm_periph_clk: clk-m-a9-periphs {
+                               #clock-cells = <0>;
+                               compatible = "fixed-factor-clock";
+                               clocks = <&clk_m_a9>;
+                               clock-div = <2>;
+                               clock-mult = <1>;
+                       };
                };
 
                /*
@@ -214,6 +204,21 @@ clk_s_c0_flexgen: clk-s-c0-flexgen {
                                                 <CLK_EXT2F_A9>,
                                                 <CLK_ICN_LMI>,
                                                 <CLK_ICN_SBC>;
+
+                               /*
+                                * ARM Peripheral clock for timers
+                                */
+                               clk_m_a9_ext2f_div2: clk-m-a9-ext2f-div2s {
+                                       #clock-cells = <0>;
+                                       compatible = "fixed-factor-clock";
+
+                                       clocks = <&clk_s_c0_flexgen 13>;
+
+                                       clock-output-names = "clk-m-a9-ext2f-div2";
+
+                                       clock-div = <2>;
+                                       clock-mult = <1>;
+                               };
                        };
                };
 
@@ -266,12 +271,6 @@ clk_s_d2_quadfs: clk-s-d2-quadfs@9106000 {
                                             "clk-s-d2-fs0-ch3";
                };
 
-               clk_tmdsout_hdmi: clk-tmdsout-hdmi {
-                       #clock-cells = <0>;
-                       compatible = "fixed-clock";
-                       clock-frequency = <0>;
-               };
-
                clockgen-d2@9106000 {
                        compatible = "st,clkgen-c32";
                        reg = <0x9106000 0x1000>;

diff --git a/arch/arm/boot/dts/stih418-clock.dtsi b/arch/arm/boot/dts/stih418-clock.dtsi
index e68bf28bd038a43ccd37e9fc27fb5de52e0faf51..a192608ff6890aa0b96fdec7cc93ae87cb891e57 100644 (file)
--- a/arch/arm/boot/dts/stih418-clock.dtsi
+++ b/arch/arm/boot/dts/stih418-clock.dtsi
@@ -7,6 +7,22 @@
  */
 #include <dt-bindings/clock/stih418-clks.h>
 / {
+       /*
+        * Fixed 30MHz oscillator inputs to SoC
+        */
+       clk_sysin: clk-sysin {
+               #clock-cells = <0>;
+               compatible = "fixed-clock";
+               clock-frequency = <30000000>;
+               clock-output-names = "CLK_SYSIN";
+       };
+
+       clk_tmdsout_hdmi: clk-tmdsout-hdmi {
+               #clock-cells = <0>;
+               compatible = "fixed-clock";
+               clock-frequency = <0>;
+       };
+
        clocks {
                #address-cells = <1>;
                #size-cells = <1>;
@@ -14,27 +30,6 @@ clocks {
 
                compatible = "st,stih418-clk", "simple-bus";
 
-               /*
-                * Fixed 30MHz oscillator inputs to SoC
-                */
-               clk_sysin: clk-sysin {
-                       #clock-cells = <0>;
-                       compatible = "fixed-clock";
-                       clock-frequency = <30000000>;
-                       clock-output-names = "CLK_SYSIN";
-               };
-
-               /*
-                * ARM Peripheral clock for timers
-                */
-               arm_periph_clk: clk-m-a9-periphs {
-                       #clock-cells = <0>;
-                       compatible = "fixed-factor-clock";
-                       clocks = <&clk_m_a9>;
-                       clock-div = <2>;
-                       clock-mult = <1>;
-               };
-
                /*
                 * A9 PLL.
                 */
@@ -64,21 +59,17 @@ clk_m_a9: clk-m-a9@92b0000 {
                                 <&clockgen_a9_pll 0>,
                                 <&clk_s_c0_flexgen 13>,
                                 <&clk_m_a9_ext2f_div2>;
-               };
 
-               /*
-                * ARM Peripheral clock for timers
-                */
-               clk_m_a9_ext2f_div2: clk-m-a9-ext2f-div2s {
-                       #clock-cells = <0>;
-                       compatible = "fixed-factor-clock";
-
-                       clocks = <&clk_s_c0_flexgen 13>;
-
-                       clock-output-names = "clk-m-a9-ext2f-div2";
-
-                       clock-div = <2>;
-                       clock-mult = <1>;
+                       /*
+                        * ARM Peripheral clock for timers
+                        */
+                       arm_periph_clk: clk-m-a9-periphs {
+                               #clock-cells = <0>;
+                               compatible = "fixed-factor-clock";
+                               clocks = <&clk_m_a9>;
+                               clock-div = <2>;
+                               clock-mult = <1>;
+                       };
                };
 
                /*
@@ -207,6 +198,21 @@ clk_s_c0_flexgen: clk-s-c0-flexgen {
                                                     "clk-proc-mixer",
                                                     "clk-proc-sc",
                                                     "clk-avsp-hevc";
+
+                               /*
+                                * ARM Peripheral clock for timers
+                                */
+                               clk_m_a9_ext2f_div2: clk-m-a9-ext2f-div2s {
+                                       #clock-cells = <0>;
+                                       compatible = "fixed-factor-clock";
+
+                                       clocks = <&clk_s_c0_flexgen 13>;
+
+                                       clock-output-names = "clk-m-a9-ext2f-div2";
+
+                                       clock-div = <2>;
+                                       clock-mult = <1>;
+                               };
                        };
                };
 
@@ -259,12 +265,6 @@ clk_s_d2_quadfs: clk-s-d2-quadfs@9106000 {
                                             "clk-s-d2-fs0-ch3";
                };
 
-               clk_tmdsout_hdmi: clk-tmdsout-hdmi {
-                       #clock-cells = <0>;
-                       compatible = "fixed-clock";
-                       clock-frequency = <0>;
-               };
-
                clockgen-d2@9106000 {
                        compatible = "st,clkgen-c32";
                        reg = <0x9106000 0x1000>;