]> asedeno.scripts.mit.edu Git - linux.git/commitdiff
arm64: dts: marvell: Add support for AP807/AP807-quad
authorMiquel Raynal <miquel.raynal@bootlin.com>
Fri, 4 Oct 2019 14:27:24 +0000 (16:27 +0200)
committerGregory CLEMENT <gregory.clement@bootlin.com>
Wed, 9 Oct 2019 07:36:40 +0000 (09:36 +0200)
Describe AP807 and AP807-quad support.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
arch/arm64/boot/dts/marvell/armada-ap807-quad.dtsi [new file with mode: 0644]
arch/arm64/boot/dts/marvell/armada-ap807.dtsi [new file with mode: 0644]

diff --git a/arch/arm64/boot/dts/marvell/armada-ap807-quad.dtsi b/arch/arm64/boot/dts/marvell/armada-ap807-quad.dtsi
new file mode 100644 (file)
index 0000000..6536469
--- /dev/null
@@ -0,0 +1,51 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Device Tree file for Marvell Armada AP807 Quad
+ *
+ * Copyright (C) 2019 Marvell Technology Group Ltd.
+ */
+
+#include "armada-ap807.dtsi"
+
+/ {
+       model = "Marvell Armada AP807 Quad";
+       compatible = "marvell,armada-ap807-quad", "marvell,armada-ap807";
+
+       cpus {
+               #address-cells = <1>;
+               #size-cells = <0>;
+
+               cpu0: cpu@0 {
+                       device_type = "cpu";
+                       compatible = "arm,cortex-a72", "arm,armv8";
+                       reg = <0x000>;
+                       enable-method = "psci";
+                       #cooling-cells = <2>;
+                       clocks = <&cpu_clk 0>;
+               };
+               cpu1: cpu@1 {
+                       device_type = "cpu";
+                       compatible = "arm,cortex-a72", "arm,armv8";
+                       reg = <0x001>;
+                       enable-method = "psci";
+                       #cooling-cells = <2>;
+                       clocks = <&cpu_clk 0>;
+               };
+               cpu2: cpu@100 {
+                       device_type = "cpu";
+                       compatible = "arm,cortex-a72", "arm,armv8";
+                       reg = <0x100>;
+                       enable-method = "psci";
+                       #cooling-cells = <2>;
+                       clocks = <&cpu_clk 1>;
+               };
+               cpu3: cpu@101 {
+                       device_type = "cpu";
+                       compatible = "arm,cortex-a72", "arm,armv8";
+                       reg = <0x101>;
+                       enable-method = "psci";
+                       #cooling-cells = <2>;
+                       clocks = <&cpu_clk 1>;
+               };
+       };
+};
diff --git a/arch/arm64/boot/dts/marvell/armada-ap807.dtsi b/arch/arm64/boot/dts/marvell/armada-ap807.dtsi
new file mode 100644 (file)
index 0000000..623010f
--- /dev/null
@@ -0,0 +1,29 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Device Tree file for Marvell Armada AP807
+ *
+ * Copyright (C) 2019 Marvell Technology Group Ltd.
+ */
+
+#define AP_NAME                ap807
+#include "armada-ap80x.dtsi"
+
+/ {
+       model = "Marvell Armada AP807";
+       compatible = "marvell,armada-ap807";
+};
+
+&ap_syscon0 {
+       ap_clk: clock {
+               compatible = "marvell,ap807-clock";
+               #clock-cells = <1>;
+       };
+};
+
+&ap_syscon1 {
+       cpu_clk: clock-cpu {
+               compatible = "marvell,ap807-cpu-clock";
+               clocks = <&ap_clk 0>, <&ap_clk 1>;
+               #clock-cells = <1>;
+       };
+};