]> asedeno.scripts.mit.edu Git - linux.git/commitdiff
dmaengine: stm32-dma: check whether length is aligned on FIFO threshold
authorPierre-Yves MORDRET <pierre-yves.mordret@st.com>
Tue, 11 Sep 2018 07:31:16 +0000 (09:31 +0200)
committerVinod Koul <vkoul@kernel.org>
Tue, 2 Oct 2018 15:02:15 +0000 (20:32 +0530)
When a period length is not multiple of FIFO some data may be stuck
within FIFO.

Burst/FIFO Threshold/Period or buffer length check has to be hardened

In any case DMA will grant any request from client but will degraded
any parameters whether awkward.

Signed-off-by: Pierre-Yves MORDRET <pierre-yves.mordret@st.com>
Signed-off-by: Vinod Koul <vkoul@kernel.org>
drivers/dma/stm32-dma.c

index 379e8d534e615cc23d4d3a0281ff9498fedd7e00..4903a408fc146eae9c5b3ac00a6e00e87046b4d6 100644 (file)
@@ -308,20 +308,12 @@ static bool stm32_dma_fifo_threshold_is_allowed(u32 burst, u32 threshold,
 
 static bool stm32_dma_is_burst_possible(u32 buf_len, u32 threshold)
 {
-       switch (threshold) {
-       case STM32_DMA_FIFO_THRESHOLD_FULL:
-               if (buf_len >= STM32_DMA_MAX_BURST)
-                       return true;
-               else
-                       return false;
-       case STM32_DMA_FIFO_THRESHOLD_HALFFULL:
-               if (buf_len >= STM32_DMA_MAX_BURST / 2)
-                       return true;
-               else
-                       return false;
-       default:
-               return false;
-       }
+       /*
+        * Buffer or period length has to be aligned on FIFO depth.
+        * Otherwise bytes may be stuck within FIFO at buffer or period
+        * length.
+        */
+       return ((buf_len % ((threshold + 1) * 4)) == 0);
 }
 
 static u32 stm32_dma_get_best_burst(u32 buf_len, u32 max_burst, u32 threshold,