arm64: dts: rockchip: Add missing cooling device properties for CPUs

The cooling device properties, like "#cooling-cells" and
"dynamic-power-coefficient", should either be present for all the CPUs
of a cluster or none. If these are present only for a subset of CPUs of
a cluster then things will start falling apart as soon as the CPUs are
brought online in a different order. For example, this will happen
because the operating system looks for such properties in the CPU node
it is trying to bring up, so that it can register a cooling device.

Add such missing properties.

Do minor rearrangement as well to keep ordering consistent.

Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>

diff --git a/arch/arm64/boot/dts/rockchip/rk3328.dtsi b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
index 241b86513c1b4f44318a435fc630f01972d5a6f6..2f38ff2f14657ce310558f6337c142979e01bd0f 100644 (file)
--- a/arch/arm64/boot/dts/rockchip/rk3328.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
@@ -52,6 +52,7 @@ cpu1: cpu@1 {
                        compatible = "arm,cortex-a53", "arm,armv8";
                        reg = <0x0 0x1>;
                        clocks = <&cru ARMCLK>;
+                       #cooling-cells = <2>;
                        dynamic-power-coefficient = <120>;
                        enable-method = "psci";
                        next-level-cache = <&l2>;
@@ -63,6 +64,7 @@ cpu2: cpu@2 {
                        compatible = "arm,cortex-a53", "arm,armv8";
                        reg = <0x0 0x2>;
                        clocks = <&cru ARMCLK>;
+                       #cooling-cells = <2>;
                        dynamic-power-coefficient = <120>;
                        enable-method = "psci";
                        next-level-cache = <&l2>;
@@ -74,6 +76,7 @@ cpu3: cpu@3 {
                        compatible = "arm,cortex-a53", "arm,armv8";
                        reg = <0x0 0x3>;
                        clocks = <&cru ARMCLK>;
+                       #cooling-cells = <2>;
                        dynamic-power-coefficient = <120>;
                        enable-method = "psci";
                        next-level-cache = <&l2>;

diff --git a/arch/arm64/boot/dts/rockchip/rk3368.dtsi b/arch/arm64/boot/dts/rockchip/rk3368.dtsi
index f52ced6091dbff65a47fa0cf0081b93fe71a6d0d..9c24de1ba43c56b70d0a29d063ec78324a764340 100644 (file)
--- a/arch/arm64/boot/dts/rockchip/rk3368.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3368.dtsi
@@ -76,7 +76,6 @@ cpu_l0: cpu@0 {
                        compatible = "arm,cortex-a53", "arm,armv8";
                        reg = <0x0 0x0>;
                        enable-method = "psci";
-
                        #cooling-cells = <2>; /* min followed by max */
                };
 
@@ -85,6 +84,7 @@ cpu_l1: cpu@1 {
                        compatible = "arm,cortex-a53", "arm,armv8";
                        reg = <0x0 0x1>;
                        enable-method = "psci";
+                       #cooling-cells = <2>; /* min followed by max */
                };
 
                cpu_l2: cpu@2 {
@@ -92,6 +92,7 @@ cpu_l2: cpu@2 {
                        compatible = "arm,cortex-a53", "arm,armv8";
                        reg = <0x0 0x2>;
                        enable-method = "psci";
+                       #cooling-cells = <2>; /* min followed by max */
                };
 
                cpu_l3: cpu@3 {
@@ -99,6 +100,7 @@ cpu_l3: cpu@3 {
                        compatible = "arm,cortex-a53", "arm,armv8";
                        reg = <0x0 0x3>;
                        enable-method = "psci";
+                       #cooling-cells = <2>; /* min followed by max */
                };
 
                cpu_b0: cpu@100 {
@@ -106,7 +108,6 @@ cpu_b0: cpu@100 {
                        compatible = "arm,cortex-a53", "arm,armv8";
                        reg = <0x0 0x100>;
                        enable-method = "psci";
-
                        #cooling-cells = <2>; /* min followed by max */
                };
 
@@ -115,6 +116,7 @@ cpu_b1: cpu@101 {
                        compatible = "arm,cortex-a53", "arm,armv8";
                        reg = <0x0 0x101>;
                        enable-method = "psci";
+                       #cooling-cells = <2>; /* min followed by max */
                };
 
                cpu_b2: cpu@102 {
@@ -122,6 +124,7 @@ cpu_b2: cpu@102 {
                        compatible = "arm,cortex-a53", "arm,armv8";
                        reg = <0x0 0x102>;
                        enable-method = "psci";
+                       #cooling-cells = <2>; /* min followed by max */
                };
 
                cpu_b3: cpu@103 {
@@ -129,6 +132,7 @@ cpu_b3: cpu@103 {
                        compatible = "arm,cortex-a53", "arm,armv8";
                        reg = <0x0 0x103>;
                        enable-method = "psci";
+                       #cooling-cells = <2>; /* min followed by max */
                };
        };
 

diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
index 2636fd82e229f9b5bcdd43e6503e24ccb38ec095..ff63d9e93b4ad0b9fcc1ac0257634eb52b4b0b52 100644 (file)
--- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
@@ -71,8 +71,8 @@ cpu_l0: cpu@0 {
                        compatible = "arm,cortex-a53", "arm,armv8";
                        reg = <0x0 0x0>;
                        enable-method = "psci";
-                       #cooling-cells = <2>; /* min followed by max */
                        clocks = <&cru ARMCLKL>;
+                       #cooling-cells = <2>; /* min followed by max */
                        dynamic-power-coefficient = <100>;
                };
 
@@ -82,6 +82,7 @@ cpu_l1: cpu@1 {
                        reg = <0x0 0x1>;
                        enable-method = "psci";
                        clocks = <&cru ARMCLKL>;
+                       #cooling-cells = <2>; /* min followed by max */
                        dynamic-power-coefficient = <100>;
                };
 
@@ -91,6 +92,7 @@ cpu_l2: cpu@2 {
                        reg = <0x0 0x2>;
                        enable-method = "psci";
                        clocks = <&cru ARMCLKL>;
+                       #cooling-cells = <2>; /* min followed by max */
                        dynamic-power-coefficient = <100>;
                };
 
@@ -100,6 +102,7 @@ cpu_l3: cpu@3 {
                        reg = <0x0 0x3>;
                        enable-method = "psci";
                        clocks = <&cru ARMCLKL>;
+                       #cooling-cells = <2>; /* min followed by max */
                        dynamic-power-coefficient = <100>;
                };
 
@@ -108,8 +111,8 @@ cpu_b0: cpu@100 {
                        compatible = "arm,cortex-a72", "arm,armv8";
                        reg = <0x0 0x100>;
                        enable-method = "psci";
-                       #cooling-cells = <2>; /* min followed by max */
                        clocks = <&cru ARMCLKB>;
+                       #cooling-cells = <2>; /* min followed by max */
                        dynamic-power-coefficient = <436>;
                };
 
@@ -119,6 +122,7 @@ cpu_b1: cpu@101 {
                        reg = <0x0 0x101>;
                        enable-method = "psci";
                        clocks = <&cru ARMCLKB>;
+                       #cooling-cells = <2>; /* min followed by max */
                        dynamic-power-coefficient = <436>;
                };
        };