]> asedeno.scripts.mit.edu Git - linux.git/commitdiff
ARM: OMAP2+: Drop legacy platform data for dra7 hdq1w
authorTony Lindgren <tony@atomide.com>
Mon, 21 Oct 2019 21:16:39 +0000 (14:16 -0700)
committerTony Lindgren <tony@atomide.com>
Mon, 21 Oct 2019 21:16:39 +0000 (14:16 -0700)
We can now probe devices with ti-sysc interconnect driver and dts
data. Let's drop the related platform data and custom ti,hwmods
dts property.

As we're just dropping data, and the early platform data init
is based on the custom ti,hwmods property, we want to drop both
the platform data and ti,hwmods property in a single patch.

Signed-off-by: Tony Lindgren <tony@atomide.com>
arch/arm/boot/dts/dra7-l4.dtsi
arch/arm/mach-omap2/omap_hwmod_7xx_data.c

index 6f16dbfab54d679909c81a498b9bb297ccbe1b77..1871cd26aafcd2be22bf58b25866e3ab7d57847e 100644 (file)
@@ -2089,7 +2089,6 @@ mmc3: mmc@0 {
 
                target-module@b2000 {                   /* 0x480b2000, ap 37 52.0 */
                        compatible = "ti,sysc-omap2", "ti,sysc";
-                       ti,hwmods = "hdq1w";
                        reg = <0xb2000 0x4>,
                              <0xb2014 0x4>,
                              <0xb2018 0x4>;
index abab70e25fb34ccafdfbfa988aaf0f2ace581901..8f2b2c7b9edef24b1b44204892169eb08cf3d7fd 100644 (file)
@@ -771,41 +771,7 @@ static struct omap_hwmod dra7xx_gpmc_hwmod = {
        },
 };
 
-/*
- * 'hdq1w' class
- *
- */
-
-static struct omap_hwmod_class_sysconfig dra7xx_hdq1w_sysc = {
-       .rev_offs       = 0x0000,
-       .sysc_offs      = 0x0014,
-       .syss_offs      = 0x0018,
-       .sysc_flags     = (SYSC_HAS_AUTOIDLE | SYSC_HAS_SOFTRESET |
-                          SYSS_HAS_RESET_STATUS),
-       .sysc_fields    = &omap_hwmod_sysc_type1,
-};
-
-static struct omap_hwmod_class dra7xx_hdq1w_hwmod_class = {
-       .name   = "hdq1w",
-       .sysc   = &dra7xx_hdq1w_sysc,
-};
 
-/* hdq1w */
-
-static struct omap_hwmod dra7xx_hdq1w_hwmod = {
-       .name           = "hdq1w",
-       .class          = &dra7xx_hdq1w_hwmod_class,
-       .clkdm_name     = "l4per_clkdm",
-       .flags          = HWMOD_INIT_NO_RESET,
-       .main_clk       = "func_12m_fclk",
-       .prcm = {
-               .omap4 = {
-                       .clkctrl_offs = DRA7XX_CM_L4PER_HDQ1W_CLKCTRL_OFFSET,
-                       .context_offs = DRA7XX_RM_L4PER_HDQ1W_CONTEXT_OFFSET,
-                       .modulemode   = MODULEMODE_SWCTRL,
-               },
-       },
-};
 
 /*
  * 'mpu' class
@@ -1864,14 +1830,6 @@ static struct omap_hwmod_ocp_if dra7xx_l3_main_1__gpmc = {
        .user           = OCP_USER_MPU | OCP_USER_SDMA,
 };
 
-/* l4_per1 -> hdq1w */
-static struct omap_hwmod_ocp_if dra7xx_l4_per1__hdq1w = {
-       .master         = &dra7xx_l4_per1_hwmod,
-       .slave          = &dra7xx_hdq1w_hwmod,
-       .clk            = "l3_iclk_div",
-       .user           = OCP_USER_MPU | OCP_USER_SDMA,
-};
-
 /* l4_cfg -> mpu */
 static struct omap_hwmod_ocp_if dra7xx_l4_cfg__mpu = {
        .master         = &dra7xx_l4_cfg_hwmod,
@@ -2237,7 +2195,6 @@ static struct omap_hwmod_ocp_if *dra7xx_hwmod_ocp_ifs[] __initdata = {
        &dra7xx_l3_main_1__sha0,
        &dra7xx_l4_per1__elm,
        &dra7xx_l3_main_1__gpmc,
-       &dra7xx_l4_per1__hdq1w,
        &dra7xx_l4_cfg__mpu,
        &dra7xx_l4_cfg__ocp2scp1,
        &dra7xx_l4_cfg__ocp2scp3,