]> asedeno.scripts.mit.edu Git - linux.git/commitdiff
arm64: dts: rockchip: add extcon nodes and enable tcphy rk3399-gru
authorEnric Balletbo i Serra <enric.balletbo@collabora.com>
Fri, 15 Dec 2017 11:00:01 +0000 (12:00 +0100)
committerHeiko Stuebner <heiko@sntech.de>
Sat, 16 Dec 2017 17:07:28 +0000 (18:07 +0100)
Enable tcphy and create the cros-ec's extcon node for the USB Type-C port.

Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Reviewed-by: Brian Norris <briannorris@chromium.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
arch/arm64/boot/dts/rockchip/rk3399-gru.dtsi

index 470105d651c2df55006bc6ef04adaadeab0487b4..03f195025390d6b8e32c4fb5cccf7045e1cf5069 100644 (file)
@@ -855,6 +855,20 @@ cros_ec_pwm: ec-pwm {
                        compatible = "google,cros-ec-pwm";
                        #pwm-cells = <1>;
                };
+
+               usbc_extcon0: extcon@0 {
+                       compatible = "google,extcon-usbc-cros-ec";
+                       google,usb-port-id = <0>;
+
+                       #extcon-cells = <0>;
+               };
+
+               usbc_extcon1: extcon@1 {
+                       compatible = "google,extcon-usbc-cros-ec";
+                       google,usb-port-id = <1>;
+
+                       #extcon-cells = <0>;
+               };
        };
 };
 
@@ -865,6 +879,16 @@ &tsadc {
        rockchip,hw-tshut-polarity = <1>; /* tshut polarity 0:LOW 1:HIGH */
 };
 
+&tcphy0 {
+       status = "okay";
+       extcon = <&usbc_extcon0>;
+};
+
+&tcphy1 {
+       status = "okay";
+       extcon = <&usbc_extcon1>;
+};
+
 &u2phy0 {
        status = "okay";
 };
@@ -911,6 +935,7 @@ &usb_host1_ohci {
 
 &usbdrd3_0 {
        status = "okay";
+       extcon = <&usbc_extcon0>;
 };
 
 &usbdrd_dwc3_0 {
@@ -920,6 +945,7 @@ &usbdrd_dwc3_0 {
 
 &usbdrd3_1 {
        status = "okay";
+       extcon = <&usbc_extcon1>;
 };
 
 &usbdrd_dwc3_1 {