]> asedeno.scripts.mit.edu Git - linux.git/commitdiff
ARM: dts: rockchip: Add cpu id to rk3288 efuse node
authorDouglas Anderson <dianders@chromium.org>
Thu, 19 Sep 2019 21:26:41 +0000 (14:26 -0700)
committerHeiko Stuebner <heiko@sntech.de>
Mon, 30 Sep 2019 20:01:11 +0000 (22:01 +0200)
This just adds in another field of what's stored in the e-fuse on
rk3288.  Though I can't personally promise that every rk3288 out there
has the CPU ID stored in the eFuse at this location, there is some
evidence that it is correct:
- This matches what was in the Chrome OS 3.14 branch (see
  EFUSE_CHIP_UID_OFFSET and EFUSE_CHIP_UID_LEN) for rk3288.
- The upstream rk3399 dts file has this same data at the same offset
  and with the same length, indiciating that this is likely common for
  several modern Rockchip SoCs.

Signed-off-by: Douglas Anderson <dianders@chromium.org>
Link: https://lore.kernel.org/r/20190919142611.1.I309434f00a2a9be71e4437991fe08abc12f06e2e@changeid
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
arch/arm/boot/dts/rk3288.dtsi

index cc893e154fe5a4ea6a9d1be776e745b249a0426c..415b48fc3ce8a05d4cd41246cd393038f0358ffa 100644 (file)
@@ -1391,6 +1391,9 @@ efuse: efuse@ffb40000 {
                clocks = <&cru PCLK_EFUSE256>;
                clock-names = "pclk_efuse";
 
+               cpu_id: cpu-id@7 {
+                       reg = <0x07 0x10>;
+               };
                cpu_leakage: cpu_leakage@17 {
                        reg = <0x17 0x1>;
                };