drm/amdkfd: Aperture setup for dGPUs

Set up the GPUVM aperture for SVM (shared virtual memory) that allows
sharing a part of virtual address space between GPUs and CPUs.

Report the size of the GPUVM aperture that is supported by KGD accurately.

The low part of the GPUVM aperture is reserved for kernel use. This is
for kernel-allocated buffers that are only accessed on the GPU:
- CWSR trap handler
- IB for submitting commands in user-mode context from kernel mode

Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>

diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_flat_memory.c b/drivers/gpu/drm/amd/amdkfd/kfd_flat_memory.c
index a06b0100af96724a8e0865ddc2c35726a452feb7..66852de410c82c9e10d197bce8f8fb87ff417cd0 100644 (file)
--- a/drivers/gpu/drm/amd/amdkfd/kfd_flat_memory.c
+++ b/drivers/gpu/drm/amd/amdkfd/kfd_flat_memory.c
@@ -278,9 +278,8 @@
 #define MAKE_GPUVM_APP_BASE(gpu_num) \
        (((uint64_t)(gpu_num) << 61) + 0x1000000000000L)
 
-#define MAKE_GPUVM_APP_LIMIT(base) \
-       (((uint64_t)(base) & \
-               0xFFFFFF0000000000UL) | 0xFFFFFFFFFFL)
+#define MAKE_GPUVM_APP_LIMIT(base, size) \
+       (((uint64_t)(base) & 0xFFFFFF0000000000UL) + (size) - 1)
 
 #define MAKE_SCRATCH_APP_BASE() \
        (((uint64_t)(0x1UL) << 61) + 0x100000000L)
@@ -293,6 +292,14 @@
 #define MAKE_LDS_APP_LIMIT(base) \
        (((uint64_t)(base) & 0xFFFFFFFF00000000UL) | 0xFFFFFFFF)
 
+/* User mode manages most of the SVM aperture address space. The low
+ * 16MB are reserved for kernel use (CWSR trap handler and kernel IB
+ * for now).
+ */
+#define SVM_USER_BASE 0x1000000ull
+#define SVM_CWSR_BASE (SVM_USER_BASE - KFD_CWSR_TBA_TMA_SIZE)
+#define SVM_IB_BASE   (SVM_CWSR_BASE - PAGE_SIZE)
+
 int kfd_init_apertures(struct kfd_process *process)
 {
        uint8_t id  = 0;
@@ -330,14 +337,28 @@ int kfd_init_apertures(struct kfd_process *process)
                        pdd->lds_base = MAKE_LDS_APP_BASE();
                        pdd->lds_limit = MAKE_LDS_APP_LIMIT(pdd->lds_base);
 
-                       pdd->gpuvm_base = MAKE_GPUVM_APP_BASE(id + 1);
-
-                       pdd->gpuvm_limit =
-                                       MAKE_GPUVM_APP_LIMIT(pdd->gpuvm_base);
-
                        pdd->scratch_base = MAKE_SCRATCH_APP_BASE();
                        pdd->scratch_limit =
                                MAKE_SCRATCH_APP_LIMIT(pdd->scratch_base);
+
+                       if (dev->device_info->needs_iommu_device) {
+                               /* APUs: GPUVM aperture in
+                                * non-canonical address space
+                                */
+                               pdd->gpuvm_base = MAKE_GPUVM_APP_BASE(id + 1);
+                               pdd->gpuvm_limit = MAKE_GPUVM_APP_LIMIT(
+                                       pdd->gpuvm_base,
+                                       dev->shared_resources.gpuvm_size);
+                       } else {
+                               /* dGPUs: SVM aperture starting at 0
+                                * with small reserved space for kernel
+                                */
+                               pdd->gpuvm_base = SVM_USER_BASE;
+                               pdd->gpuvm_limit =
+                                       dev->shared_resources.gpuvm_size - 1;
+                               pdd->qpd.cwsr_base = SVM_CWSR_BASE;
+                               pdd->qpd.ib_base = SVM_IB_BASE;
+                       }
                }
 
                dev_dbg(kfd_device, "node id %u\n", id);

diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_priv.h b/drivers/gpu/drm/amd/amdkfd/kfd_priv.h
index 014d608226d5ed8f38bdbb344dc9ba5b9cbe916b..0d5d924b31ef6936669224a059122a2cf8850d6b 100644 (file)
--- a/drivers/gpu/drm/amd/amdkfd/kfd_priv.h
+++ b/drivers/gpu/drm/amd/amdkfd/kfd_priv.h
@@ -488,8 +488,12 @@ struct qcm_process_device {
 
        /* CWSR memory */
        void *cwsr_kaddr;
+       uint64_t cwsr_base;
        uint64_t tba_addr;
        uint64_t tma_addr;
+
+       /* IB memory */
+       uint64_t ib_base;
 };
 
 /* KFD Memory Eviction */