]> asedeno.scripts.mit.edu Git - linux.git/commitdiff
arm64: dts: ns2: Fix PCIe controller interrupt type
authorRay Jui <ray.jui@broadcom.com>
Tue, 12 Jun 2018 20:21:30 +0000 (13:21 -0700)
committerFlorian Fainelli <f.fainelli@gmail.com>
Mon, 18 Jun 2018 16:46:10 +0000 (09:46 -0700)
Fix PCIe controller interrupt to use IRQ_TYPE_LEVEL_HIGH for Broadcom
NS2 SoC.

Fixes: fd5e5dd56a2f ("arm64: dts: Add PCIe0 and PCIe4 DT nodes for NS2")
Signed-off-by: Ray Jui <ray.jui@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
arch/arm64/boot/dts/broadcom/northstar2/ns2.dtsi

index c0e48966a5e2debe8e1977e662e75edf79e56119..4057197048dcbbacaee733c6067cc677fd1ad54d 100644 (file)
@@ -118,7 +118,7 @@ pcie0: pcie@20020000 {
 
                #interrupt-cells = <1>;
                interrupt-map-mask = <0 0 0 0>;
-               interrupt-map = <0 0 0 0 &gic 0 GIC_SPI 281 IRQ_TYPE_NONE>;
+               interrupt-map = <0 0 0 0 &gic 0 GIC_SPI 281 IRQ_TYPE_LEVEL_HIGH>;
 
                linux,pci-domain = <0>;
 
@@ -149,7 +149,7 @@ pcie4: pcie@50020000 {
 
                #interrupt-cells = <1>;
                interrupt-map-mask = <0 0 0 0>;
-               interrupt-map = <0 0 0 0 &gic 0 GIC_SPI 305 IRQ_TYPE_NONE>;
+               interrupt-map = <0 0 0 0 &gic 0 GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>;
 
                linux,pci-domain = <4>;