]> asedeno.scripts.mit.edu Git - linux.git/commitdiff
dt-bindings: timer: Add andestech atcpit100 timer binding doc
authorRick Chen <rickchen36@gmail.com>
Mon, 11 Dec 2017 07:51:31 +0000 (15:51 +0800)
committerGreentime Hu <greentime@andestech.com>
Thu, 22 Feb 2018 02:44:36 +0000 (10:44 +0800)
Add a document to describe Andestech atcpit100 timer and
binding information.

Signed-off-by: Rick Chen <rickchen36@gmail.com>
Signed-off-by: Greentime Hu <green.hu@gmail.com>
Acked-by: Rob Herring <robh@kernel.org>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Documentation/devicetree/bindings/timer/andestech,atcpit100-timer.txt [new file with mode: 0644]

diff --git a/Documentation/devicetree/bindings/timer/andestech,atcpit100-timer.txt b/Documentation/devicetree/bindings/timer/andestech,atcpit100-timer.txt
new file mode 100644 (file)
index 0000000..4c9ea59
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@@ -0,0 +1,33 @@
+Andestech ATCPIT100 timer
+------------------------------------------------------------------
+ATCPIT100 is a generic IP block from Andes Technology, embedded in
+Andestech AE3XX platforms and other designs.
+
+This timer is a set of compact multi-function timers, which can be
+used as pulse width modulators (PWM) as well as simple timers.
+
+It supports up to 4 PIT channels. Each PIT channel is a
+multi-function timer and provide the following usage scenarios:
+One 32-bit timer
+Two 16-bit timers
+Four 8-bit timers
+One 16-bit PWM
+One 16-bit timer and one 8-bit PWM
+Two 8-bit timer and one 8-bit PWM
+
+Required properties:
+- compatible   : Should be "andestech,atcpit100"
+- reg          : Address and length of the register set
+- interrupts   : Reference to the timer interrupt
+- clocks       : a clock to provide the tick rate for "andestech,atcpit100"
+- clock-names  : should be "PCLK" for the peripheral clock source.
+
+Examples:
+
+timer0: timer@f0400000 {
+       compatible = "andestech,atcpit100";
+       reg = <0xf0400000 0x1000>;
+       interrupts = <2>;
+       clocks = <&apb>;
+       clock-names = "PCLK";
+};