]> asedeno.scripts.mit.edu Git - linux.git/commitdiff
perf/x86/intel: Move regs->flags EXACT bit init
authorStephane Eranian <eranian@google.com>
Thu, 5 Apr 2018 06:29:51 +0000 (23:29 -0700)
committerIngo Molnar <mingo@kernel.org>
Thu, 5 Apr 2018 07:28:40 +0000 (09:28 +0200)
This patch removes a redundant store on regs->flags introduced
by commit:

  71eb9ee9596d ("perf/x86/intel: Fix linear IP of PEBS real_ip on Haswell and later CPUs")

We were clearing the PERF_EFLAGS_EXACT but it was overwritten by
regs->flags = pebs->flags later on.

The PERF_EFLAGS_EXACT is a software flag using bit 3 of regs->flags.
X86 marks this bit as Reserved. To make sure this bit is zero before
we do any IP processing, we clear it explicitly.

Patch also removes the following assignment:

regs->flags = pebs->flags | (regs->flags & PERF_EFLAGS_VM);

Because there is no regs->flags to preserve anymore because
set_linear_ip() is not called until later.

Signed-off-by: Stephane Eranian <eranian@google.com>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: Arnaldo Carvalho de Melo <acme@redhat.com>
Cc: Jiri Olsa <jolsa@redhat.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Namhyung Kim <namhyung@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Vince Weaver <vincent.weaver@maine.edu>
Cc: kan.liang@intel.com
Link: http://lkml.kernel.org/r/1522909791-32498-1-git-send-email-eranian@google.com
[ Improve capitalization, punctuation and clarity of comments. ]
Signed-off-by: Ingo Molnar <mingo@kernel.org>
arch/x86/events/intel/ds.c

index da6780122786275aea65396b3cdfe38bf9f93b09..8a10a045b57bde1345c542b8bbe2a19920d2400b 100644 (file)
@@ -1153,7 +1153,6 @@ static void setup_pebs_sample_data(struct perf_event *event,
        if (pebs == NULL)
                return;
 
-       regs->flags &= ~PERF_EFLAGS_EXACT;
        sample_type = event->attr.sample_type;
        dsrc = sample_type & PERF_SAMPLE_DATA_SRC;
 
@@ -1197,7 +1196,13 @@ static void setup_pebs_sample_data(struct perf_event *event,
         * and PMI.
         */
        *regs = *iregs;
-       regs->flags = pebs->flags;
+
+       /*
+        * Initialize regs_>flags from PEBS,
+        * Clear exact bit (which uses x86 EFLAGS Reserved bit 3),
+        * i.e., do not rely on it being zero:
+        */
+       regs->flags = pebs->flags & ~PERF_EFLAGS_EXACT;
 
        if (sample_type & PERF_SAMPLE_REGS_INTR) {
                regs->ax = pebs->ax;
@@ -1217,10 +1222,6 @@ static void setup_pebs_sample_data(struct perf_event *event,
                        regs->sp = pebs->sp;
                }
 
-               /*
-                * Preserve PERF_EFLAGS_VM from set_linear_ip().
-                */
-               regs->flags = pebs->flags | (regs->flags & PERF_EFLAGS_VM);
 #ifndef CONFIG_X86_32
                regs->r8 = pebs->r8;
                regs->r9 = pebs->r9;
@@ -1234,20 +1235,33 @@ static void setup_pebs_sample_data(struct perf_event *event,
        }
 
        if (event->attr.precise_ip > 1) {
-               /* Haswell and later have the eventing IP, so use it: */
+               /*
+                * Haswell and later processors have an 'eventing IP'
+                * (real IP) which fixes the off-by-1 skid in hardware.
+                * Use it when precise_ip >= 2 :
+                */
                if (x86_pmu.intel_cap.pebs_format >= 2) {
                        set_linear_ip(regs, pebs->real_ip);
                        regs->flags |= PERF_EFLAGS_EXACT;
                } else {
-                       /* Otherwise use PEBS off-by-1 IP: */
+                       /* Otherwise, use PEBS off-by-1 IP: */
                        set_linear_ip(regs, pebs->ip);
 
-                       /* ... and try to fix it up using the LBR entries: */
+                       /*
+                        * With precise_ip >= 2, try to fix up the off-by-1 IP
+                        * using the LBR. If successful, the fixup function
+                        * corrects regs->ip and calls set_linear_ip() on regs:
+                        */
                        if (intel_pmu_pebs_fixup_ip(regs))
                                regs->flags |= PERF_EFLAGS_EXACT;
                }
-       } else
+       } else {
+               /*
+                * When precise_ip == 1, return the PEBS off-by-1 IP,
+                * no fixup attempted:
+                */
                set_linear_ip(regs, pebs->ip);
+       }
 
 
        if ((sample_type & (PERF_SAMPLE_ADDR | PERF_SAMPLE_PHYS_ADDR)) &&