]> asedeno.scripts.mit.edu Git - linux.git/commitdiff
r8169: speed up rtl_loop_wait
authorHeiner Kallweit <hkallweit1@gmail.com>
Sat, 4 May 2019 13:20:38 +0000 (15:20 +0200)
committerDavid S. Miller <davem@davemloft.net>
Sun, 5 May 2019 17:52:02 +0000 (10:52 -0700)
When testing I figured out that most operations signal finish even
before we trigger the first delay. Seems like PCI(e) access and
memory barriers typically add enough latency. Therefore move the
first delay after the first check.

Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
drivers/net/ethernet/realtek/r8169.c

index ee54648a3c6dfbb8ab25a85f0204443651f3bd12..290debbe1f482e87356e8877ed0624b895e7d55b 100644 (file)
@@ -775,9 +775,9 @@ static bool rtl_loop_wait(struct rtl8169_private *tp, const struct rtl_cond *c,
        int i;
 
        for (i = 0; i < n; i++) {
-               delay(d);
                if (c->check(tp) == high)
                        return true;
+               delay(d);
        }
        netif_err(tp, drv, tp->dev, "%s == %d (loop: %d, delay: %d).\n",
                  c->msg, !high, n, d);