Merge tag 'arc-4.6-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/vgupta/arc

Pull ARC architecture updates from Vineet Gupta:
 - Big Endian io accessors fix [Lada]
 - Spellos fixes [Adam]
 - Fix for DW GMAC breakage [Alexey]
 - Making DMA API 64-bit ready
 - Shutting up -Wmaybe-uninitialized noise for ARC
 - Other minor fixes here and there, comments update

* tag 'arc-4.6-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/vgupta/arc: (21 commits)
  ARCv2: ioremap: Support dynamic peripheral address space
  ARC: dma: reintroduce platform specific dma<->phys
  ARC: dma: ioremap: use phys_addr_t consistenctly in code paths
  ARC: dma: pass_phys() not sg_virt() to cache ops
  ARC: dma: non-coherent pages need V-P mapping if in HIGHMEM
  ARC: dma: Use struct page based page allocator helpers
  ARC: build: Turn off -Wmaybe-uninitialized for ARC gcc 4.8
  ARC: [plat-axs10x] add Ethernet PHY description in .dts
  arc: use of_platform_default_populate() to populate default bus
  ARC: thp: unbork !CONFIG_TRANSPARENT_HUGEPAGE build
  arc: [plat-nsimosci*] use ezchip network driver
  ARCv2: LLSC: software backoff is NOT needed starting HS2.1c
  ARC: mm: Use virt_to_pfn() for addr >> PAGE_SHIFT pattern
  ARC: [plat-nsim] document ranges
  ARC: build: Better way to detect ISA compatible toolchain
  ARCv2: Allow enabling PAE40 w/o HIGHMEM
  ARC: [BE] readl()/writel() to work in Big Endian CPU configuration
  ARC: [*defconfig] No need to specify CONFIG_CROSS_COMPILE
  ARC: [BE] Select correct CROSS_COMPILE prefix
  ARC: bitops: Remove non relevant comments
  ...

diff --combined arch/arc/Kconfig
index 07a5cb944d4ff730d1015cdcbff9ffc82d3905f8,5c086d5eae5b444ba83738e8d2ff19357684456d..208aae071b378550fa47ade47332ec9351f62e43
--- 1/arch/arc/Kconfig
--- 2/arch/arc/Kconfig
+++ b/arch/arc/Kconfig
@@@ -17,7 -17,6 +17,7 @@@ config AR
        select GENERIC_FIND_FIRST_BIT
        # for now, we don't need GENERIC_IRQ_PROBE, CONFIG_GENERIC_IRQ_CHIP
        select GENERIC_IRQ_SHOW
 +      select GENERIC_PCI_IOMAP
        select GENERIC_PENDING_IRQ if SMP
        select GENERIC_SMP_IDLE_THREAD
        select HAVE_ARCH_KGDB
@@@ -38,9 -37,6 +38,9 @@@
        select PERF_USE_VMALLOC
        select HAVE_DEBUG_STACKOVERFLOW
  
 +config MIGHT_HAVE_PCI
 +      bool
 +
  config TRACE_IRQFLAGS_SUPPORT
        def_bool y
  
@@@ -391,7 -387,7 +391,7 @@@ config ARC_HAS_LLS
  
  config ARC_STAR_9000923308
        bool "Workaround for llock/scond livelock"
-       default y
+       default n
        depends on ISA_ARCV2 && SMP && ARC_HAS_LLSC
  
  config ARC_HAS_SWAPE
@@@ -462,7 -458,6 +462,6 @@@ config ARC_HAS_PAE4
        bool "Support for the 40-bit Physical Address Extension"
        default n
        depends on ISA_ARCV2
-       select HIGHMEM
        help
          Enable access to physical memory beyond 4G, only supported on
          ARC cores with 40 bit Physical Addressing support
@@@ -473,6 -468,9 +472,9 @@@ config ARCH_PHYS_ADDR_T_64BI
  config ARCH_DMA_ADDR_T_64BIT
        bool
  
+ config ARC_PLAT_NEEDS_PHYS_TO_DMA
+       bool
+ 
  config ARC_CURR_IN_REG
        bool "Dedicate Register r25 for current_task pointer"
        default y
@@@ -573,28 -571,6 +575,28 @@@ config FORCE_MAX_ZONEORDE
  
  source "net/Kconfig"
  source "drivers/Kconfig"
 +
 +menu "Bus Support"
 +
 +config PCI
 +      bool "PCI support" if MIGHT_HAVE_PCI
 +      help
 +        PCI is the name of a bus system, i.e., the way the CPU talks to
 +        the other stuff inside your box.  Find out if your board/platform
 +        has PCI.
 +
 +        Note: PCIe support for Synopsys Device will be available only
 +        when HAPS DX is configured with PCIe RC bitmap. If you have PCI,
 +        say Y, otherwise N.
 +
 +config PCI_SYSCALL
 +      def_bool PCI
 +
 +source "drivers/pci/Kconfig"
 +source "drivers/pci/pcie/Kconfig"
 +
 +endmenu
 +
  source "fs/Kconfig"
  source "arch/arc/Kconfig.debug"
  source "security/Kconfig"

diff --combined arch/arc/include/asm/io.h
index 947bf0cfdec0065632f6b9831ddbe2f48a3b8a33,1a20a62d192ac06239fa29c467d40dcaf1ef5b4e..17f85c9c73cfe830a40280ad79bf9decb1b65a17
--- 1/arch/arc/include/asm/io.h
--- 2/arch/arc/include/asm/io.h
+++ b/arch/arc/include/asm/io.h
@@@ -13,18 -13,9 +13,18 @@@
  #include <asm/byteorder.h>
  #include <asm/page.h>
  
- extern void __iomem *ioremap(unsigned long physaddr, unsigned long size);
- extern void __iomem *ioremap_prot(phys_addr_t offset, unsigned long size,
+ extern void __iomem *ioremap(phys_addr_t paddr, unsigned long size);
+ extern void __iomem *ioremap_prot(phys_addr_t paddr, unsigned long size,
                                  unsigned long flags);
 +static inline void __iomem *ioport_map(unsigned long port, unsigned int nr)
 +{
 +      return (void __iomem *)port;
 +}
 +
 +static inline void ioport_unmap(void __iomem *addr)
 +{
 +}
 +
  extern void iounmap(const void __iomem *addr);
  
  #define ioremap_nocache(phy, sz)      ioremap(phy, sz)
@@@ -138,15 -129,23 +138,23 @@@ static inline void __raw_writel(u32 w, 
  #define writel(v,c)           ({ __iowmb(); writel_relaxed(v,c); })
  
  /*
-  * Relaxed API for drivers which can handle any ordering themselves
+  * Relaxed API for drivers which can handle barrier ordering themselves
+  *
+  * Also these are defined to perform little endian accesses.
+  * To provide the typical device register semantics of fixed endian,
+  * swap the byte order for Big Endian
+  *
+  * http://lkml.kernel.org/r/201603100845.30602.arnd@arndb.de
   */
  #define readb_relaxed(c)      __raw_readb(c)
- #define readw_relaxed(c)      __raw_readw(c)
- #define readl_relaxed(c)      __raw_readl(c)
+ #define readw_relaxed(c) ({ u16 __r = le16_to_cpu((__force __le16) \
+                                       __raw_readw(c)); __r; })
+ #define readl_relaxed(c) ({ u32 __r = le32_to_cpu((__force __le32) \
+                                       __raw_readl(c)); __r; })
  
  #define writeb_relaxed(v,c)   __raw_writeb(v,c)
- #define writew_relaxed(v,c)   __raw_writew(v,c)
- #define writel_relaxed(v,c)   __raw_writel(v,c)
+ #define writew_relaxed(v,c)   __raw_writew((__force u16) cpu_to_le16(v),c)
+ #define writel_relaxed(v,c)   __raw_writel((__force u32) cpu_to_le32(v),c)
  
  #include <asm-generic/io.h>