drm/amdgpu/display: fix the build without CONFIG_DRM_AMD_DC_DSC_SUPPORT

Some code was missing the CONFIG_DRM_AMD_DC_DSC_SUPPORT guard.

Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c
index 69e4d0d96c7f69a9927e0b7b977bca026d3f2c88..38b3c89b2a599de55fbe260ecb5e832ce72f5d38 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c
@@ -630,9 +630,11 @@ static void dcn20_init_hw(struct dc *dc)
                }
        }
 
+#ifdef CONFIG_DRM_AMD_DC_DSC_SUPPORT
        /* Power gate DSCs */
        for (i = 0; i < res_pool->res_cap->num_dsc; i++)
                dcn20_dsc_pg_control(hws, res_pool->dscs[i]->inst, false);
+#endif
 
        /* Blank pixel data with OPP DPG */
        for (i = 0; i < dc->res_pool->timing_generator_count; i++) {