]> asedeno.scripts.mit.edu Git - linux.git/commitdiff
scsi: hisi_sas: init connect cfg register for v3 hw
authorXiaofei Tan <tanxiaofei@huawei.com>
Tue, 24 Oct 2017 15:51:43 +0000 (23:51 +0800)
committerMartin K. Petersen <martin.petersen@oracle.com>
Tue, 31 Oct 2017 16:27:59 +0000 (12:27 -0400)
Add initialization of register CON_CFG_DRIVER for v3 hw, to limit
number of the times of setup connection.

Signed-off-by: Xiaofei Tan <tanxiaofei@huawei.com>
Signed-off-by: John Garry <john.garry@huawei.com>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
drivers/scsi/hisi_sas/hisi_sas_v3_hw.c

index c88e787325bb216dc015352457160e99ca56cce9..5fbd121cedb3339cd61779c2d22631d491eb869a 100644 (file)
 #define RX_IDAF_DWORD0                 (PORT_BASE + 0xc4)
 #define RXOP_CHECK_CFG_H               (PORT_BASE + 0xfc)
 #define STP_LINK_TIMER                 (PORT_BASE + 0x120)
+#define CON_CFG_DRIVER                 (PORT_BASE + 0x130)
 #define SAS_SSP_CON_TIMER_CFG          (PORT_BASE + 0x134)
 #define SAS_SMP_CON_TIMER_CFG          (PORT_BASE + 0x138)
 #define SAS_STP_CON_TIMER_CFG          (PORT_BASE + 0x13c)
@@ -422,6 +423,8 @@ static void init_reg_v3_hw(struct hisi_hba *hisi_hba)
                                     0xa03e8);
                hisi_sas_phy_write32(hisi_hba, i, STP_LINK_TIMER,
                                     0x7f7a120);
+               hisi_sas_phy_write32(hisi_hba, i, CON_CFG_DRIVER,
+                                    0x2a0a80);
        }
        for (i = 0; i < hisi_hba->queue_count; i++) {
                /* Delivery queue */