ARM: dts: r8a7790: Remove unit-addresses and regs from integrated caches

The Cortex-A15/A7 cache controllers are integrated controllers, and thus
the device nodes representing them should not have unit-addresses or reg
properties.

Fixes: 2c3de36700d4f3a5 ("ARM: dts: r8a7790: Fix W=1 dtc warnings")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi
index 6d10450de6d7b97fcd287ba965cd3f331e66dc85..20cf191e0852b10a5c565ac9c86fabc671d9d63b 100644 (file)
--- a/arch/arm/boot/dts/r8a7790.dtsi
+++ b/arch/arm/boot/dts/r8a7790.dtsi
@@ -129,17 +129,15 @@ cpu7: cpu@103 {
                        next-level-cache = <&L2_CA7>;
                };
 
-               L2_CA15: cache-controller@0 {
+               L2_CA15: cache-controller-0 {
                        compatible = "cache";
-                       reg = <0>;
                        power-domains = <&sysc R8A7790_PD_CA15_SCU>;
                        cache-unified;
                        cache-level = <2>;
                };
 
-               L2_CA7: cache-controller@100 {
+               L2_CA7: cache-controller-1 {
                        compatible = "cache";
-                       reg = <0x100>;
                        power-domains = <&sysc R8A7790_PD_CA7_SCU>;
                        cache-unified;
                        cache-level = <2>;