drm/i915: Improve HiZ throughput on Cherryview.

Found by reading the HIZ_CHICKEN documentation.

Improves performance in a HiZ microbenchmark by around 50%.
Improves performance in OglZBuffer by around 18%.

Thanks to Chris Wilson for helping me figure out where to put this.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>

diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 0f32fd1a9d1017e8bef2377b8fd1f1c47ecf65fa..a39bb0385bcbcfa5b086a3fd6c43c5a26c3f1870 100644 (file)
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -5202,6 +5202,9 @@ enum punit_power_well {
 #define COMMON_SLICE_CHICKEN2                  0x7014
 # define GEN8_CSC2_SBE_VUE_CACHE_CONSERVATIVE  (1<<0)
 
+#define HIZ_CHICKEN                            0x7018
+# define CHV_HZ_8X8_MODE_IN_1X                 (1<<15)
+
 #define GEN7_L3SQCREG1                         0xB010
 #define  VLV_B0_WA_L3SQCREG1_VALUE             0x00D30000
 

diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
index 12a36f0ca53d61e589d708d37e3791bfd4d8625e..dabc1d8d2ae3ce5ce1409978e85c4036afaa319c 100644 (file)
--- a/drivers/gpu/drm/i915/intel_ringbuffer.c
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
@@ -836,6 +836,9 @@ static int chv_init_workarounds(struct intel_engine_cs *ring)
                          HDC_FORCE_NON_COHERENT |
                          HDC_DONOT_FETCH_MEM_WHEN_MASKED);
 
+       /* Improve HiZ throughput on CHV. */
+       WA_SET_BIT_MASKED(HIZ_CHICKEN, CHV_HZ_8X8_MODE_IN_1X);
+
        return 0;
 }