arm64: dts: rockchip: extent bus-ranges of PCIe for rk3399

In order to support multiple hierarchy of PCIe buses,
for instance, PCIe switch, we need to extent bus-ranges
to as max as possible. We have 32 regions and could support
up to 31 buses except bus 0 for our root bridge.

Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>

diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
index 25cb51dd10c5a242c1d23277efb7af94bb6eca64..532b89dd62661f2fda332792c08fc37c1dc7a702 100644 (file)
--- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
@@ -220,7 +220,7 @@ pcie0: pcie@f8000000 {
                #size-cells = <2>;
                #interrupt-cells = <1>;
                aspm-no-l0s;
-               bus-range = <0x0 0x1>;
+               bus-range = <0x0 0x1f>;
                clocks = <&cru ACLK_PCIE>, <&cru ACLK_PERF_PCIE>,
                         <&cru PCLK_PCIE>, <&cru SCLK_PCIE_PM>;
                clock-names = "aclk", "aclk-perf",