]> asedeno.scripts.mit.edu Git - linux.git/commitdiff
platform/x86: intel_pmc_core: Fix PCH IP name
authorRajneesh Bhardwaj <rajneesh.bhardwaj@linux.intel.com>
Fri, 1 Feb 2019 07:32:27 +0000 (13:02 +0530)
committerAndy Shevchenko <andriy.shevchenko@linux.intel.com>
Tue, 5 Feb 2019 18:28:55 +0000 (20:28 +0200)
For Cannonlake and Icelake, the IP name for Res_6 should be SPF i.e.
South Port F. No functional change is intended other than just renaming
the IP appropriately.

Cc: "David E. Box" <david.e.box@intel.com>
Cc: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
Fixes: 291101f6a735 ("platform/x86: intel_pmc_core: Add CannonLake PCH support")
Signed-off-by: Rajneesh Bhardwaj <rajneesh.bhardwaj@linux.intel.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
drivers/platform/x86/intel_pmc_core.c

index 9f143cdbea057b3d496c6bf12cceac85a181786a..80936e6bdc619e0a9e904f8a0acedc5c67c4cb29 100644 (file)
@@ -203,7 +203,7 @@ static const struct pmc_bit_map cnp_pfear_map[] = {
        {"CNVI",                BIT(3)},
        {"UFS0",                BIT(4)},
        {"EMMC",                BIT(5)},
-       {"Res_6",               BIT(6)},
+       {"SPF",                 BIT(6)},
        {"SBR6",                BIT(7)},
 
        {"SBR7",                BIT(0)},