]> asedeno.scripts.mit.edu Git - linux.git/commitdiff
ARM: dts: add DTS for Baltos IR3220
authorYegor Yefremov <yegorslists@googlemail.com>
Tue, 26 Apr 2016 13:00:25 +0000 (15:00 +0200)
committerTony Lindgren <tony@atomide.com>
Tue, 26 Apr 2016 18:01:58 +0000 (11:01 -0700)
Signed-off-by: Yegor Yefremov <yegorslists@googlemail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
arch/arm/boot/dts/Makefile
arch/arm/boot/dts/am335x-baltos-ir3220.dts [new file with mode: 0644]

index e323922287483269adf877ad978edf8a579c1772..2c19cd9f39a6dd129585b5265653985d10242e4e 100644 (file)
@@ -485,6 +485,7 @@ dtb-$(CONFIG_SOC_TI81XX) += \
        dm8168-evm.dtb \
        dra62x-j5eco-evm.dtb
 dtb-$(CONFIG_SOC_AM33XX) += \
+       am335x-baltos-ir3220.dtb \
        am335x-baltos-ir5221.dtb \
        am335x-base0033.dtb \
        am335x-bone.dtb \
diff --git a/arch/arm/boot/dts/am335x-baltos-ir3220.dts b/arch/arm/boot/dts/am335x-baltos-ir3220.dts
new file mode 100644 (file)
index 0000000..fe002a1
--- /dev/null
@@ -0,0 +1,119 @@
+/*
+ * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+/*
+ * VScom OnRISC
+ * http://www.vscom.de
+ */
+
+/dts-v1/;
+
+#include "am335x-baltos.dtsi"
+
+/ {
+       model = "OnRISC Baltos iR 3220";
+};
+
+&am33xx_pinmux {
+       tca6416_pins: pinmux_tca6416_pins {
+               pinctrl-single,pins = <
+                       AM33XX_IOPAD(0x9b4, PIN_INPUT_PULLUP | MUX_MODE7)      /* xdma_event_intr1.gpio0[20] tca6416 stuff */
+               >;
+       };
+
+       uart1_pins: pinmux_uart1_pins {
+               pinctrl-single,pins = <
+                       AM33XX_IOPAD(0x980, PIN_INPUT | MUX_MODE0)      /* uart1_rxd */
+                       AM33XX_IOPAD(0x984, PIN_INPUT | MUX_MODE0)      /* uart1_txd */
+                       AM33XX_IOPAD(0x978, PIN_INPUT_PULLDOWN | MUX_MODE0)      /* uart1_ctsn */
+                       AM33XX_IOPAD(0x97c, PIN_OUTPUT_PULLDOWN | MUX_MODE0)      /* uart1_rtsn */
+                       AM33XX_IOPAD(0x8e0, PIN_OUTPUT_PULLDOWN | MUX_MODE7)      /* lcd_vsync.gpio2[22] DTR */
+                       AM33XX_IOPAD(0x8e4, PIN_INPUT_PULLDOWN | MUX_MODE7)      /* lcd_hsync.gpio2[23] DSR */
+                       AM33XX_IOPAD(0x8e8, PIN_INPUT_PULLDOWN | MUX_MODE7)      /* lcd_pclk.gpio2[24] DCD */
+                       AM33XX_IOPAD(0x8ec, PIN_INPUT_PULLDOWN | MUX_MODE7)      /* lcd_ac_bias_en.gpio2[25] RI */
+               >;
+       };
+
+       uart2_pins: pinmux_uart2_pins {
+               pinctrl-single,pins = <
+                       AM33XX_IOPAD(0x950, PIN_INPUT | MUX_MODE1)      /* spi0_sclk.uart2_rxd_mux3 */
+                       AM33XX_IOPAD(0x954, PIN_OUTPUT | MUX_MODE1)      /* spi0_d0.uart2_txd_mux3 */
+                       AM33XX_IOPAD(0x988, PIN_INPUT_PULLDOWN | MUX_MODE2)      /* i2c0_sda.uart2_ctsn_mux0 */
+                       AM33XX_IOPAD(0x98c, PIN_OUTPUT_PULLDOWN | MUX_MODE2)      /* i2c0_scl.uart2_rtsn_mux0 */
+                       AM33XX_IOPAD(0x830, PIN_OUTPUT_PULLDOWN | MUX_MODE7)      /* gpmc_ad12.gpio1[12] DTR */
+                       AM33XX_IOPAD(0x834, PIN_INPUT_PULLDOWN | MUX_MODE7)      /* gpmc_ad13.gpio1[13] DSR */
+                       AM33XX_IOPAD(0x838, PIN_INPUT_PULLDOWN | MUX_MODE7)      /* gpmc_ad14.gpio1[14] DCD */
+                       AM33XX_IOPAD(0x83c, PIN_INPUT_PULLDOWN | MUX_MODE7)     /* gpmc_ad15.gpio1[15] RI */
+
+                       AM33XX_IOPAD(0x9a0, PIN_INPUT_PULLUP | MUX_MODE7)      /* mcasp0_aclkr.gpio3[18], INPUT_PULLDOWN | MODE7 */
+               >;
+       };
+};
+
+&uart1 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&uart1_pins>;
+       dtr-gpios = <&gpio2 22 GPIO_ACTIVE_LOW>;
+       dsr-gpios = <&gpio2 23 GPIO_ACTIVE_LOW>;
+       dcd-gpios = <&gpio2 24 GPIO_ACTIVE_LOW>;
+       rng-gpios = <&gpio2 25 GPIO_ACTIVE_LOW>;
+
+       status = "okay";
+};
+
+&uart2 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&uart2_pins>;
+       dtr-gpios = <&gpio1 12 GPIO_ACTIVE_LOW>;
+       dsr-gpios = <&gpio1 13 GPIO_ACTIVE_LOW>;
+       dcd-gpios = <&gpio1 14 GPIO_ACTIVE_LOW>;
+       rng-gpios = <&gpio1 15 GPIO_ACTIVE_LOW>;
+
+       status = "okay";
+};
+
+&i2c1 {
+       tca6416: gpio@20 {
+               compatible = "ti,tca6416";
+               reg = <0x20>;
+               gpio-controller;
+               #gpio-cells = <2>;
+               interrupt-parent = <&gpio0>;
+               interrupts = <20 GPIO_ACTIVE_LOW>;
+               pinctrl-names = "default";
+               pinctrl-0 = <&tca6416_pins>;
+       };
+};
+
+&usb0_phy {
+       status = "okay";
+};
+
+&usb0 {
+       status = "okay";
+       dr_mode = "host";
+};
+
+&cpsw_emac0 {
+       phy-mode = "rmii";
+       dual_emac_res_vlan = <1>;
+       fixed-link {
+               speed = <100>;
+               full-duplex;
+       };
+};
+
+&cpsw_emac1 {
+       phy_id = <&davinci_mdio>, <7>;
+       phy-mode = "rgmii-txid";
+       dual_emac_res_vlan = <2>;
+};
+
+&phy_sel {
+       rmii-clock-ext = <1>;
+};