]> asedeno.scripts.mit.edu Git - linux.git/commitdiff
drm/i915/cnl: Extend WM workaround with IPC for CNL
authorKumar, Mahesh <mahesh1.kumar@intel.com>
Thu, 17 Aug 2017 13:45:26 +0000 (19:15 +0530)
committerMaarten Lankhorst <maarten.lankhorst@linux.intel.com>
Thu, 7 Sep 2017 11:34:33 +0000 (13:34 +0200)
CNL:A & CNL:B have same workaround as KBL to increase wm level latency
by 4us if IPC is enabled.

Signed-off-by: Mahesh Kumar <mahesh1.kumar@intel.com>
Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20170817134529.2839-6-mahesh1.kumar@intel.com
drivers/gpu/drm/i915/intel_pm.c

index 629ad54e2797e4cdfa0818372a988ba0c4656a7b..f2911de69ea9a510ecff10d8d1fc1e953891f2e1 100644 (file)
@@ -4492,7 +4492,8 @@ static int skl_compute_plane_wm(const struct drm_i915_private *dev_priv,
        }
 
        /* Display WA #1141: kbl,cfl */
-       if ((IS_KABYLAKE(dev_priv) || IS_COFFEELAKE(dev_priv)) &&
+       if ((IS_KABYLAKE(dev_priv) || IS_COFFEELAKE(dev_priv) ||
+           IS_CNL_REVID(dev_priv, CNL_REVID_A0, CNL_REVID_B0)) &&
            dev_priv->ipc_enabled)
                latency += 4;