m68knommu: factor some common ColdFire cpu reset code

A number of the early ColdFire cores use the same code to reset the CPU.
Currently that is duplicated in each of the sub-arch files. Pull out this
common code and use a single copy of it for all CPU types that use it.

Signed-off-by: Greg Ungerer <gerg@uclinux.org>

diff --git a/arch/m68k/platform/5206/config.c b/arch/m68k/platform/5206/config.c
index c81dd51ff758a9d26f5af4525e7f0c5b0cbb1343..6bfbeebd231be8eef5f461361275abd65e6de5b7 100644 (file)
--- a/arch/m68k/platform/5206/config.c
+++ b/arch/m68k/platform/5206/config.c
@@ -19,17 +19,6 @@
 
 /***************************************************************************/
 
-void m5206_cpu_reset(void)
-{
-       local_irq_disable();
-       /* Set watchdog to soft reset, and enabled */
-       __raw_writeb(0xc0, MCF_MBAR + MCFSIM_SYPCR);
-       for (;;)
-               /* wait for watchdog to timeout */;
-}
-
-/***************************************************************************/
-
 void __init config_BSP(char *commandp, int size)
 {
 #if defined(CONFIG_NETtel)
@@ -38,7 +27,6 @@ void __init config_BSP(char *commandp, int size)
        commandp[size-1] = 0;
 #endif /* CONFIG_NETtel */
 
-       mach_reset = m5206_cpu_reset;
        mach_sched_init = hw_timer_init;
 
        /* Only support the external interrupts on their primary level */

diff --git a/arch/m68k/platform/5249/config.c b/arch/m68k/platform/5249/config.c
index cda273383226604a8f3e065529d7d0cf2078be96..bbf05135bb985710f480539f8176b7449aae51d5 100644 (file)
--- a/arch/m68k/platform/5249/config.c
+++ b/arch/m68k/platform/5249/config.c
@@ -83,21 +83,10 @@ static void __init m5249_smc91x_init(void)
 
 /***************************************************************************/
 
-void m5249_cpu_reset(void)
-{
-       local_irq_disable();
-       /* Set watchdog to soft reset, and enabled */
-       __raw_writeb(0xc0, MCF_MBAR + MCFSIM_SYPCR);
-       for (;;)
-               /* wait for watchdog to timeout */;
-}
-
-/***************************************************************************/
-
 void __init config_BSP(char *commandp, int size)
 {
-       mach_reset = m5249_cpu_reset;
        mach_sched_init = hw_timer_init;
+
 #ifdef CONFIG_M5249C3
        m5249_smc91x_init();
 #endif

diff --git a/arch/m68k/platform/5307/config.c b/arch/m68k/platform/5307/config.c
index 5f4bf6cb017f87e438ad49860065787ccb590251..a568d2870d15c6cec6d758f550934be3c7b441af 100644 (file)
--- a/arch/m68k/platform/5307/config.c
+++ b/arch/m68k/platform/5307/config.c
@@ -28,17 +28,6 @@ unsigned char ledbank = 0xff;
 
 /***************************************************************************/
 
-void m5307_cpu_reset(void)
-{
-       local_irq_disable();
-       /* Set watchdog to soft reset, and enabled */
-       __raw_writeb(0xc0, MCF_MBAR + MCFSIM_SYPCR);
-       for (;;)
-               /* wait for watchdog to timeout */;
-}
-
-/***************************************************************************/
-
 void __init config_BSP(char *commandp, int size)
 {
 #if defined(CONFIG_NETtel) || \
@@ -48,7 +37,6 @@ void __init config_BSP(char *commandp, int size)
        commandp[size-1] = 0;
 #endif
 
-       mach_reset = m5307_cpu_reset;
        mach_sched_init = hw_timer_init;
 
        /* Only support the external interrupts on their primary level */

diff --git a/arch/m68k/platform/5407/config.c b/arch/m68k/platform/5407/config.c
index 19c612557b9802b3945a3d85eddc943e8dbefa72..bb6c746ae819ab388eba2dbd429997771124338f 100644 (file)
--- a/arch/m68k/platform/5407/config.c
+++ b/arch/m68k/platform/5407/config.c
@@ -19,20 +19,8 @@
 
 /***************************************************************************/
 
-void m5407_cpu_reset(void)
-{
-       local_irq_disable();
-       /* set watchdog to soft reset, and enabled */
-       __raw_writeb(0xc0, MCF_MBAR + MCFSIM_SYPCR);
-       for (;;)
-               /* wait for watchdog to timeout */;
-}
-
-/***************************************************************************/
-
 void __init config_BSP(char *commandp, int size)
 {
-       mach_reset = m5407_cpu_reset;
        mach_sched_init = hw_timer_init;
 
        /* Only support the external interrupts on their primary level */

diff --git a/arch/m68k/platform/coldfire/Makefile b/arch/m68k/platform/coldfire/Makefile
index 4572af29b6b7dd83a82f3892bf33e9ddf962d52a..bccab9331ee1bf1e7bafdd554e3c1f2e139b5e2f 100644 (file)
--- a/arch/m68k/platform/coldfire/Makefile
+++ b/arch/m68k/platform/coldfire/Makefile
@@ -15,17 +15,17 @@
 asflags-$(CONFIG_FULLDEBUG) := -DDEBUGGER_COMPATIBLE_CACHE=1
 
 obj-$(CONFIG_COLDFIRE) += cache.o clk.o device.o dma.o entry.o vectors.o
-obj-$(CONFIG_M5206)    += timers.o intc.o
-obj-$(CONFIG_M5206e)   += timers.o intc.o
+obj-$(CONFIG_M5206)    += timers.o intc.o reset.o
+obj-$(CONFIG_M5206e)   += timers.o intc.o reset.o
 obj-$(CONFIG_M520x)    += pit.o intc-simr.o
 obj-$(CONFIG_M523x)    += pit.o dma_timer.o intc-2.o
-obj-$(CONFIG_M5249)    += timers.o intc.o
+obj-$(CONFIG_M5249)    += timers.o intc.o reset.o
 obj-$(CONFIG_M527x)    += pit.o intc-2.o
 obj-$(CONFIG_M5272)    += timers.o
 obj-$(CONFIG_M528x)    += pit.o intc-2.o
-obj-$(CONFIG_M5307)    += timers.o intc.o
+obj-$(CONFIG_M5307)    += timers.o intc.o reset.o
 obj-$(CONFIG_M532x)    += timers.o intc-simr.o
-obj-$(CONFIG_M5407)    += timers.o intc.o
+obj-$(CONFIG_M5407)    += timers.o intc.o reset.o
 obj-$(CONFIG_M54xx)    += sltimers.o intc-2.o
 
 obj-y                  += pinmux.o gpio.o

diff --git a/arch/m68k/platform/coldfire/reset.c b/arch/m68k/platform/coldfire/reset.c
new file mode 100644 (file)
index 0000000..5ed78d3
--- /dev/null
+++ b/arch/m68k/platform/coldfire/reset.c
@@ -0,0 +1,33 @@
+/*
+ * reset.c  -- common ColdFire SoC reset support
+ *
+ * (C) Copyright 2012, Greg Ungerer <gerg@uclinux.org>
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file COPYING in the main directory of this archive
+ * for more details.
+ */
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/io.h>
+#include <asm/machdep.h>
+#include <asm/coldfire.h>
+#include <asm/mcfsim.h>
+
+void mcf_cpu_reset(void)
+{
+       local_irq_disable();
+       /* Set watchdog to soft reset, and enabled */
+       __raw_writeb(0xc0, MCF_MBAR + MCFSIM_SYPCR);
+       for (;;)
+               /* wait for watchdog to timeout */;
+}
+
+static int __init mcf_setup_reset(void)
+{
+       mach_reset = mcf_cpu_reset;
+       return 0;
+}
+
+arch_initcall(mcf_setup_reset);