gpu: host1x: Do not limit DMA segment size

host1x nor any its clients have any limitations on the DMA segment size,
so don't pretend that they do.

Signed-off-by: Thierry Reding <treding@nvidia.com>

diff --git a/drivers/gpu/host1x/bus.c b/drivers/gpu/host1x/bus.c
index 742aa9ff21b871e674111cb64ee2c3cd91c5b661..2c8559ff3481fe54ad32edde2c7eb1ab78f938c4 100644 (file)
--- a/drivers/gpu/host1x/bus.c
+++ b/drivers/gpu/host1x/bus.c
@@ -445,7 +445,7 @@ static int host1x_device_add(struct host1x *host1x,
        of_dma_configure(&device->dev, host1x->dev->of_node, true);
 
        device->dev.dma_parms = &device->dma_parms;
-       dma_set_max_seg_size(&device->dev, SZ_4M);
+       dma_set_max_seg_size(&device->dev, UINT_MAX);
 
        err = host1x_device_parse_dt(device, driver);
        if (err < 0) {

diff --git a/drivers/gpu/host1x/dev.c b/drivers/gpu/host1x/dev.c
index 5a3f797240d4914c5370f5446d3275f1d12a103e..e5fdeea27158810a6f2229648fa3b21e24148c4a 100644 (file)
--- a/drivers/gpu/host1x/dev.c
+++ b/drivers/gpu/host1x/dev.c
@@ -237,6 +237,9 @@ static int host1x_probe(struct platform_device *pdev)
                        return PTR_ERR(host->hv_regs);
        }
 
+       host->dev->dma_parms = &host->dma_parms;
+       dma_set_max_seg_size(host->dev, UINT_MAX);
+
        dma_set_mask_and_coherent(host->dev, host->info->dma_mask);
 
        if (host->info->init) {

diff --git a/drivers/gpu/host1x/dev.h b/drivers/gpu/host1x/dev.h
index ff56f5e23a02e64c0f36b3cf47365c8d50ac6627..abafde7c665ebe2e6c74cfb3fd21dbe9729bf561 100644 (file)
--- a/drivers/gpu/host1x/dev.h
+++ b/drivers/gpu/host1x/dev.h
@@ -140,6 +140,8 @@ struct host1x {
        struct list_head devices;
 
        struct list_head list;
+
+       struct device_dma_parameters dma_parms;
 };
 
 void host1x_hypervisor_writel(struct host1x *host1x, u32 r, u32 v);