]> asedeno.scripts.mit.edu Git - linux.git/commitdiff
pinctrl: sunxi: Move the reset handling functions out of the core
authorMaxime Ripard <maxime.ripard@free-electrons.com>
Sat, 26 Apr 2014 20:28:54 +0000 (22:28 +0200)
committerMaxime Ripard <maxime.ripard@free-electrons.com>
Mon, 5 May 2014 00:57:18 +0000 (19:57 -0500)
The way that reset is handled right now is that it is made optional for every
pinctrl driver, while actually, it isn't used at all for the main pin
controllers so far, and while it's mandatory for the A31's secondary pin
controller.

Move the reset functions out of the core and in the driver, where they can be
made mandatory.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
drivers/pinctrl/sunxi/pinctrl-sun6i-a31-r.c
drivers/pinctrl/sunxi/pinctrl-sunxi.c

index b896f7ba606e7bf4e8d8ceb170e64dbb2c4291f4..8fcba48e0a424b05ed805b4288013689838bca51 100644 (file)
@@ -17,6 +17,7 @@
 #include <linux/of.h>
 #include <linux/of_device.h>
 #include <linux/pinctrl/pinctrl.h>
+#include <linux/reset.h>
 
 #include "pinctrl-sunxi.h"
 
@@ -96,8 +97,26 @@ static const struct sunxi_pinctrl_desc sun6i_a31_r_pinctrl_data = {
 
 static int sun6i_a31_r_pinctrl_probe(struct platform_device *pdev)
 {
-       return sunxi_pinctrl_init(pdev,
-                                 &sun6i_a31_r_pinctrl_data);
+       struct reset_control *rstc;
+       int ret;
+
+       rstc = devm_reset_control_get(&pdev->dev, NULL);
+       if (IS_ERR(rstc)) {
+               dev_err(&pdev->dev, "Reset controller missing\n");
+               return PTR_ERR(rstc);
+       }
+
+       ret = reset_control_deassert(rstc);
+       if (ret)
+               return ret;
+
+       ret = sunxi_pinctrl_init(pdev,
+                                &sun6i_a31_r_pinctrl_data);
+
+       if (ret)
+               reset_control_assert(rstc);
+
+       return ret;
 }
 
 static struct of_device_id sun6i_a31_r_pinctrl_match[] = {
index 2c3fb92b8972f10b7569de18268d290482d1181f..f6522b54ece9e49730e114bc244e87c85e19663e 100644 (file)
@@ -26,7 +26,6 @@
 #include <linux/pinctrl/pinconf-generic.h>
 #include <linux/pinctrl/pinmux.h>
 #include <linux/platform_device.h>
-#include <linux/reset.h>
 #include <linux/slab.h>
 
 #include "../core.h"
@@ -781,7 +780,6 @@ int sunxi_pinctrl_init(struct platform_device *pdev,
        struct device_node *node = pdev->dev.of_node;
        struct pinctrl_pin_desc *pins;
        struct sunxi_pinctrl *pctl;
-       struct reset_control *rstc;
        struct resource *res;
        int i, ret, last_pin;
        struct clk *clk;
@@ -875,17 +873,10 @@ int sunxi_pinctrl_init(struct platform_device *pdev,
        if (ret)
                goto gpiochip_error;
 
-       rstc = devm_reset_control_get_optional(&pdev->dev, NULL);
-       if (!IS_ERR(rstc)) {
-               ret = reset_control_deassert(rstc);
-               if (ret)
-                       goto clk_error;
-       }
-
        pctl->irq = irq_of_parse_and_map(node, 0);
        if (!pctl->irq) {
                ret = -EINVAL;
-               goto rstc_error;
+               goto clk_error;
        }
 
        pctl->domain = irq_domain_add_linear(node, SUNXI_IRQ_NUMBER,
@@ -893,7 +884,7 @@ int sunxi_pinctrl_init(struct platform_device *pdev,
        if (!pctl->domain) {
                dev_err(&pdev->dev, "Couldn't register IRQ domain\n");
                ret = -ENOMEM;
-               goto rstc_error;
+               goto clk_error;
        }
 
        for (i = 0; i < SUNXI_IRQ_NUMBER; i++) {
@@ -911,9 +902,6 @@ int sunxi_pinctrl_init(struct platform_device *pdev,
 
        return 0;
 
-rstc_error:
-       if (!IS_ERR(rstc))
-               reset_control_assert(rstc);
 clk_error:
        clk_disable_unprepare(clk);
 gpiochip_error: