]> asedeno.scripts.mit.edu Git - linux.git/commitdiff
ARM: clk-imx6q: Add CAAM clock support
authorVictoria Milhoan <vicki.milhoan@freescale.com>
Wed, 5 Aug 2015 18:28:43 +0000 (11:28 -0700)
committerHerbert Xu <herbert@gondor.apana.org.au>
Mon, 10 Aug 2015 15:19:02 +0000 (23:19 +0800)
Add CAAM clock support to the i.MX6 clocking infrastructure.

Signed-off-by: Victoria Milhoan <vicki.milhoan@freescale.com>
Tested-by: Horia Geantă <horia.geanta@freescale.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
drivers/clk/imx/clk-imx6q.c
include/dt-bindings/clock/imx6qdl-clock.h

index d046f8e43de8d056d1af2cb1ae4bd790019d2d9a..15e855745216cadaafea8a1f34fc1bd479d83caf 100644 (file)
@@ -381,6 +381,9 @@ static void __init imx6q_clocks_init(struct device_node *ccm_node)
        clk[IMX6QDL_CLK_ASRC]         = imx_clk_gate2_shared("asrc",         "asrc_podf",   base + 0x68, 6, &share_count_asrc);
        clk[IMX6QDL_CLK_ASRC_IPG]     = imx_clk_gate2_shared("asrc_ipg",     "ahb",         base + 0x68, 6, &share_count_asrc);
        clk[IMX6QDL_CLK_ASRC_MEM]     = imx_clk_gate2_shared("asrc_mem",     "ahb",         base + 0x68, 6, &share_count_asrc);
+       clk[IMX6QDL_CLK_CAAM_MEM]     = imx_clk_gate2("caam_mem",      "ahb",               base + 0x68, 8);
+       clk[IMX6QDL_CLK_CAAM_ACLK]    = imx_clk_gate2("caam_aclk",     "ahb",               base + 0x68, 10);
+       clk[IMX6QDL_CLK_CAAM_IPG]     = imx_clk_gate2("caam_ipg",      "ipg",               base + 0x68, 12);
        clk[IMX6QDL_CLK_CAN1_IPG]     = imx_clk_gate2("can1_ipg",      "ipg",               base + 0x68, 14);
        clk[IMX6QDL_CLK_CAN1_SERIAL]  = imx_clk_gate2("can1_serial",   "can_root",          base + 0x68, 16);
        clk[IMX6QDL_CLK_CAN2_IPG]     = imx_clk_gate2("can2_ipg",      "ipg",               base + 0x68, 18);
index 8780868458a09e9b35d7fdee97f732663da0a61c..8de173ff19f310bbb8c0e9d7a7e26cb442079ff7 100644 (file)
 #define IMX6QDL_CLK_VIDEO_27M                  238
 #define IMX6QDL_CLK_MIPI_CORE_CFG              239
 #define IMX6QDL_CLK_MIPI_IPG                   240
-#define IMX6QDL_CLK_END                                241
+#define IMX6QDL_CLK_CAAM_MEM                   241
+#define IMX6QDL_CLK_CAAM_ACLK                  242
+#define IMX6QDL_CLK_CAAM_IPG                   243
+#define IMX6QDL_CLK_END                                244
 
 #endif /* __DT_BINDINGS_CLOCK_IMX6QDL_H */