drm/i915: Remove highly confusing i915_gem_obj_ggtt_pin()

Since i915_gem_obj_ggtt_pin() is an idiom breaking curry function for
i915_gem_object_ggtt_pin(), spare us the confusion and remove it.
Removing it now simplifies later patches to change the i915_vma_pin()
(and friends) interface.

v2: Add a redundant GEM_BUG_ON(!view) to
i915_gem_obj_lookup_or_create_ggtt_vma()

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1470324762-2545-18-git-send-email-chris@chris-wilson.co.uk

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index cda8238c952f900c57f0b72d84479f53fd5c02ff..7ba99057c317d2589d9105f87d4548b93633d49c 100644 (file)
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -3289,15 +3289,6 @@ static inline bool i915_gem_obj_ggtt_bound(struct drm_i915_gem_object *obj)
 unsigned long
 i915_gem_obj_ggtt_size(struct drm_i915_gem_object *obj);
 
-static inline int __must_check
-i915_gem_obj_ggtt_pin(struct drm_i915_gem_object *obj,
-                     uint32_t alignment,
-                     unsigned flags)
-{
-       return i915_gem_object_ggtt_pin(obj, &i915_ggtt_view_normal,
-                                       0, alignment, flags);
-}
-
 void i915_gem_object_ggtt_unpin_view(struct drm_i915_gem_object *obj,
                                     const struct i915_ggtt_view *view);
 static inline void

diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index f9e45ad9aee1032c2daa6cc74d61309339fcc50f..fdacedc27d8770c014b5e2b409206f496e9ebe0c 100644 (file)
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -652,7 +652,7 @@ i915_gem_gtt_pread(struct drm_device *dev,
        uint64_t offset;
        int ret;
 
-       ret = i915_gem_obj_ggtt_pin(obj, 0, PIN_MAPPABLE);
+       ret = i915_gem_object_ggtt_pin(obj, NULL, 0, 0, PIN_MAPPABLE);
        if (ret) {
                ret = insert_mappable_node(dev_priv, &node, PAGE_SIZE);
                if (ret)
@@ -949,7 +949,8 @@ i915_gem_gtt_pwrite_fast(struct drm_i915_private *i915,
        if (obj->tiling_mode != I915_TILING_NONE)
                return -EFAULT;
 
-       ret = i915_gem_obj_ggtt_pin(obj, 0, PIN_MAPPABLE | PIN_NONBLOCK);
+       ret = i915_gem_object_ggtt_pin(obj, NULL, 0, 0,
+                                      PIN_MAPPABLE | PIN_NONBLOCK);
        if (ret) {
                ret = insert_mappable_node(i915, &node, PAGE_SIZE);
                if (ret)
@@ -3719,7 +3720,7 @@ int __i915_vma_do_pin(struct i915_vma *vma,
                goto err;
        }
 
-       if ((bound & (I915_VMA_GLOBAL_BIND | I915_VMA_LOCAL_BIND)) == 0) {
+       if ((bound & I915_VMA_BIND_MASK) == 0) {
                ret = i915_vma_insert(vma, size, alignment, flags);
                if (ret)
                        goto err;
@@ -3750,7 +3751,8 @@ i915_gem_object_ggtt_pin(struct drm_i915_gem_object *obj,
        struct i915_vma *vma;
        int ret;
 
-       BUG_ON(!view);
+       if (!view)
+               view = &i915_ggtt_view_normal;
 
        vma = i915_gem_obj_lookup_or_create_ggtt_vma(obj, view);
        if (IS_ERR(vma))
@@ -3782,12 +3784,7 @@ void
 i915_gem_object_ggtt_unpin_view(struct drm_i915_gem_object *obj,
                                const struct i915_ggtt_view *view)
 {
-       struct i915_vma *vma = i915_gem_obj_to_ggtt_view(obj, view);
-
-       WARN_ON(!i915_vma_is_pinned(vma));
-       WARN_ON(!i915_gem_obj_ggtt_bound_view(obj, view));
-
-       __i915_vma_unpin(vma);
+       i915_vma_unpin(i915_gem_obj_to_ggtt_view(obj, view));
 }
 
 int

diff --git a/drivers/gpu/drm/i915/i915_gem_context.c b/drivers/gpu/drm/i915/i915_gem_context.c
index dc7c0ae73b62a77ea35bb34affcbb4b4c43f4adc..bb72af5320b0ccf21a24c21044322c6cdadfb8d8 100644 (file)
--- a/drivers/gpu/drm/i915/i915_gem_context.c
+++ b/drivers/gpu/drm/i915/i915_gem_context.c
@@ -763,9 +763,8 @@ static int do_rcs_switch(struct drm_i915_gem_request *req)
                return 0;
 
        /* Trying to pin first makes error handling easier. */
-       ret = i915_gem_obj_ggtt_pin(to->engine[RCS].state,
-                                   to->ggtt_alignment,
-                                   0);
+       ret = i915_gem_object_ggtt_pin(to->engine[RCS].state, NULL, 0,
+                                      to->ggtt_alignment, 0);
        if (ret)
                return ret;
 

diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
index a0c95ab15d574d30579d73db745e8fd774354245..109bb9d8df4a3ad83140c125eaa004bf150de083 100644 (file)
--- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
+++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
@@ -1270,7 +1270,7 @@ i915_gem_execbuffer_parse(struct intel_engine_cs *engine,
        if (ret)
                goto err;
 
-       ret = i915_gem_obj_ggtt_pin(shadow_batch_obj, 0, 0);
+       ret = i915_gem_object_ggtt_pin(shadow_batch_obj, NULL, 0, 0, 0);
        if (ret)
                goto err;
 
@@ -1650,7 +1650,7 @@ i915_gem_do_execbuffer(struct drm_device *dev, void *data,
                 *   fitting due to fragmentation.
                 * So this is actually safe.
                 */
-               ret = i915_gem_obj_ggtt_pin(obj, 0, 0);
+               ret = i915_gem_object_ggtt_pin(obj, NULL, 0, 0, 0);
                if (ret)
                        goto err;
 

diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
index af012b1cd1ec607220cb0f03382b16ec599558e4..db97155074d3aefedd529b22f3f397e9a0cbe6a7 100644 (file)
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -3430,6 +3430,8 @@ i915_gem_obj_lookup_or_create_ggtt_vma(struct drm_i915_gem_object *obj,
        struct i915_ggtt *ggtt = &dev_priv->ggtt;
        struct i915_vma *vma = i915_gem_obj_to_ggtt_view(obj, view);
 
+       GEM_BUG_ON(!view);
+
        if (!vma)
                vma = __i915_gem_vma_create(obj, &ggtt->base, view);
 

diff --git a/drivers/gpu/drm/i915/i915_gem_render_state.c b/drivers/gpu/drm/i915/i915_gem_render_state.c
index 90236672ac1e1a5b47172115d6d646fb514ac175..57fd767a2d79c1b2704af0a39ab9760298d8b75e 100644 (file)
--- a/drivers/gpu/drm/i915/i915_gem_render_state.c
+++ b/drivers/gpu/drm/i915/i915_gem_render_state.c
@@ -191,7 +191,7 @@ int i915_gem_render_state_init(struct drm_i915_gem_request *req)
        if (IS_ERR(so.obj))
                return PTR_ERR(so.obj);
 
-       ret = i915_gem_obj_ggtt_pin(so.obj, 4096, 0);
+       ret = i915_gem_object_ggtt_pin(so.obj, NULL, 0, 0, 0);
        if (ret)
                goto err_obj;
 

diff --git a/drivers/gpu/drm/i915/i915_guc_submission.c b/drivers/gpu/drm/i915/i915_guc_submission.c
index c9105f68cc4e3d7a475affccd40e48f1359766d2..03a5cef353eb12c51f5bc3b6ea19f1f1f949525e 100644 (file)
--- a/drivers/gpu/drm/i915/i915_guc_submission.c
+++ b/drivers/gpu/drm/i915/i915_guc_submission.c
@@ -635,8 +635,8 @@ gem_allocate_guc_obj(struct drm_i915_private *dev_priv, u32 size)
                return NULL;
        }
 
-       if (i915_gem_obj_ggtt_pin(obj, PAGE_SIZE,
-                       PIN_OFFSET_BIAS | GUC_WOPCM_TOP)) {
+       if (i915_gem_object_ggtt_pin(obj, NULL, 0, PAGE_SIZE,
+                                    PIN_OFFSET_BIAS | GUC_WOPCM_TOP)) {
                i915_gem_object_put(obj);
                return NULL;
        }

diff --git a/drivers/gpu/drm/i915/intel_guc_loader.c b/drivers/gpu/drm/i915/intel_guc_loader.c
index b883efd35e3f16d7928d502437c3d737732d2198..3763e30cc16588a3c21f4e6efa475bf8edafbd58 100644 (file)
--- a/drivers/gpu/drm/i915/intel_guc_loader.c
+++ b/drivers/gpu/drm/i915/intel_guc_loader.c
@@ -323,7 +323,7 @@ static int guc_ucode_xfer(struct drm_i915_private *dev_priv)
                return ret;
        }
 
-       ret = i915_gem_obj_ggtt_pin(guc_fw->guc_fw_obj, 0, 0);
+       ret = i915_gem_object_ggtt_pin(guc_fw->guc_fw_obj, NULL, 0, 0, 0);
        if (ret) {
                DRM_DEBUG_DRIVER("pin failed %d\n", ret);
                return ret;

diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
index 622cd0bdef381dde269d76205efdbeae728b9b12..361977fd117016140942675a3238eff05c8427d3 100644 (file)
--- a/drivers/gpu/drm/i915/intel_lrc.c
+++ b/drivers/gpu/drm/i915/intel_lrc.c
@@ -799,8 +799,9 @@ static int intel_lr_context_pin(struct i915_gem_context *ctx,
        if (ce->pin_count++)
                return 0;
 
-       ret = i915_gem_obj_ggtt_pin(ce->state, GEN8_LR_CONTEXT_ALIGN,
-                                   PIN_OFFSET_BIAS | GUC_WOPCM_TOP);
+       ret = i915_gem_object_ggtt_pin(ce->state, NULL,
+                                      0, GEN8_LR_CONTEXT_ALIGN,
+                                      PIN_OFFSET_BIAS | GUC_WOPCM_TOP);
        if (ret)
                goto err;
 
@@ -1203,7 +1204,8 @@ static int lrc_setup_wa_ctx_obj(struct intel_engine_cs *engine, u32 size)
                return ret;
        }
 
-       ret = i915_gem_obj_ggtt_pin(engine->wa_ctx.obj, PAGE_SIZE, 0);
+       ret = i915_gem_object_ggtt_pin(engine->wa_ctx.obj, NULL,
+                                      0, PAGE_SIZE, 0);
        if (ret) {
                DRM_DEBUG_DRIVER("pin LRC WA ctx backing obj failed: %d\n",
                                 ret);

diff --git a/drivers/gpu/drm/i915/intel_overlay.c b/drivers/gpu/drm/i915/intel_overlay.c
index 2c598d63c794c8a68dc84cfabc86fa622133e5d9..217fefc49bf9238544cfcad01343b7e21719ae15 100644 (file)
--- a/drivers/gpu/drm/i915/intel_overlay.c
+++ b/drivers/gpu/drm/i915/intel_overlay.c
@@ -1401,7 +1401,8 @@ void intel_setup_overlay(struct drm_i915_private *dev_priv)
                }
                overlay->flip_addr = reg_bo->phys_handle->busaddr;
        } else {
-               ret = i915_gem_obj_ggtt_pin(reg_bo, PAGE_SIZE, PIN_MAPPABLE);
+               ret = i915_gem_object_ggtt_pin(reg_bo, NULL,
+                                              0, PAGE_SIZE, PIN_MAPPABLE);
                if (ret) {
                        DRM_ERROR("failed to pin overlay register bo\n");
                        goto out_free_bo;

diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
index ac2e610ab37fa19b8984ff7e3cb401b8879ec998..a862234ccf184389449c397ce7856ccadaf8c9ca 100644 (file)
--- a/drivers/gpu/drm/i915/intel_ringbuffer.c
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
@@ -639,7 +639,7 @@ int intel_init_pipe_control(struct intel_engine_cs *engine, int size)
                goto err;
        }
 
-       ret = i915_gem_obj_ggtt_pin(obj, 4096, PIN_HIGH);
+       ret = i915_gem_object_ggtt_pin(obj, NULL, 0, 4096, PIN_HIGH);
        if (ret)
                goto err_unref;
 
@@ -1896,7 +1896,7 @@ static int init_status_page(struct intel_engine_cs *engine)
                         * actualy map it).
                         */
                        flags |= PIN_MAPPABLE;
-               ret = i915_gem_obj_ggtt_pin(obj, 4096, flags);
+               ret = i915_gem_object_ggtt_pin(obj, NULL, 0, 4096, flags);
                if (ret) {
 err_unref:
                        i915_gem_object_put(obj);
@@ -1943,7 +1943,7 @@ int intel_ring_pin(struct intel_ring *ring)
        int ret;
 
        if (HAS_LLC(dev_priv) && !obj->stolen) {
-               ret = i915_gem_obj_ggtt_pin(obj, PAGE_SIZE, flags);
+               ret = i915_gem_object_ggtt_pin(obj, NULL, 0, PAGE_SIZE, flags);
                if (ret)
                        return ret;
 
@@ -1957,8 +1957,8 @@ int intel_ring_pin(struct intel_ring *ring)
                        goto err_unpin;
                }
        } else {
-               ret = i915_gem_obj_ggtt_pin(obj, PAGE_SIZE,
-                                           flags | PIN_MAPPABLE);
+               ret = i915_gem_object_ggtt_pin(obj, NULL, 0, PAGE_SIZE,
+                                              flags | PIN_MAPPABLE);
                if (ret)
                        return ret;
 
@@ -2092,7 +2092,8 @@ static int intel_ring_context_pin(struct i915_gem_context *ctx,
                return 0;
 
        if (ce->state) {
-               ret = i915_gem_obj_ggtt_pin(ce->state, ctx->ggtt_alignment, 0);
+               ret = i915_gem_object_ggtt_pin(ce->state, NULL, 0,
+                                              ctx->ggtt_alignment, 0);
                if (ret)
                        goto error;
        }
@@ -2649,7 +2650,7 @@ static void intel_ring_init_semaphores(struct drm_i915_private *dev_priv,
                        i915.semaphores = 0;
                } else {
                        i915_gem_object_set_cache_level(obj, I915_CACHE_LLC);
-                       ret = i915_gem_obj_ggtt_pin(obj, 0, PIN_NONBLOCK);
+                       ret = i915_gem_object_ggtt_pin(obj, NULL, 0, 0, 0);
                        if (ret != 0) {
                                i915_gem_object_put(obj);
                                DRM_ERROR("Failed to pin semaphore bo. Disabling semaphores\n");