]> asedeno.scripts.mit.edu Git - linux.git/commitdiff
arm64: dts: rockchip: add clocks in iommu nodes
authorJeffy Chen <jeffy.chen@rock-chips.com>
Fri, 23 Mar 2018 07:38:07 +0000 (15:38 +0800)
committerHeiko Stuebner <heiko@sntech.de>
Mon, 16 Apr 2018 12:13:13 +0000 (14:13 +0200)
Add clocks in iommu nodes, since we are going to control clocks in
rockchip iommu driver.

Signed-off-by: Jeffy Chen <jeffy.chen@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
arch/arm64/boot/dts/rockchip/rk3328.dtsi
arch/arm64/boot/dts/rockchip/rk3368.dtsi
arch/arm64/boot/dts/rockchip/rk3399.dtsi

index be2bfbc6b4831a82e6567d91b036e46e583de036..b8e9da15e00c5b16ff444f681466d5454184f040 100644 (file)
@@ -595,6 +595,8 @@ h265e_mmu: iommu@ff330200 {
                reg = <0x0 0xff330200 0 0x100>;
                interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
                interrupt-names = "h265e_mmu";
+               clocks = <&cru ACLK_H265>, <&cru PCLK_H265>;
+               clock-names = "aclk", "iface";
                #iommu-cells = <0>;
                status = "disabled";
        };
@@ -604,6 +606,8 @@ vepu_mmu: iommu@ff340800 {
                reg = <0x0 0xff340800 0x0 0x40>;
                interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
                interrupt-names = "vepu_mmu";
+               clocks = <&cru ACLK_VPU>, <&cru HCLK_VPU>;
+               clock-names = "aclk", "iface";
                #iommu-cells = <0>;
                status = "disabled";
        };
@@ -613,6 +617,8 @@ vpu_mmu: iommu@ff350800 {
                reg = <0x0 0xff350800 0x0 0x40>;
                interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
                interrupt-names = "vpu_mmu";
+               clocks = <&cru ACLK_VPU>, <&cru HCLK_VPU>;
+               clock-names = "aclk", "iface";
                #iommu-cells = <0>;
                status = "disabled";
        };
@@ -622,6 +628,8 @@ rkvdec_mmu: iommu@ff360480 {
                reg = <0x0 0xff360480 0x0 0x40>, <0x0 0xff3604c0 0x0 0x40>;
                interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
                interrupt-names = "rkvdec_mmu";
+               clocks = <&cru ACLK_RKVDEC>, <&cru HCLK_RKVDEC>;
+               clock-names = "aclk", "iface";
                #iommu-cells = <0>;
                status = "disabled";
        };
@@ -631,6 +639,8 @@ vop_mmu: iommu@ff373f00 {
                reg = <0x0 0xff373f00 0x0 0x100>;
                interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
                interrupt-names = "vop_mmu";
+               clocks = <&cru ACLK_VOP>, <&cru HCLK_VOP>;
+               clock-names = "aclk", "iface";
                #iommu-cells = <0>;
                status = "disabled";
        };
index 03458ac44201c7c66d0e991881ab24e292bfdee2..ad91ced786494afdb9428ea9c83adaf8e6f56e71 100644 (file)
@@ -742,6 +742,8 @@ iep_mmu: iommu@ff900800 {
                reg = <0x0 0xff900800 0x0 0x100>;
                interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
                interrupt-names = "iep_mmu";
+               clocks = <&cru ACLK_IEP>, <&cru HCLK_IEP>;
+               clock-names = "aclk", "iface";
                #iommu-cells = <0>;
                status = "disabled";
        };
@@ -752,6 +754,8 @@ isp_mmu: iommu@ff914000 {
                      <0x0 0xff915000 0x0 0x100>;
                interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
                interrupt-names = "isp_mmu";
+               clocks = <&cru ACLK_ISP>, <&cru HCLK_ISP>;
+               clock-names = "aclk", "iface";
                #iommu-cells = <0>;
                rockchip,disable-mmu-reset;
                status = "disabled";
@@ -762,6 +766,8 @@ vop_mmu: iommu@ff930300 {
                reg = <0x0 0xff930300 0x0 0x100>;
                interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
                interrupt-names = "vop_mmu";
+               clocks = <&cru ACLK_VOP>, <&cru HCLK_VOP>;
+               clock-names = "aclk", "iface";
                #iommu-cells = <0>;
                status = "disabled";
        };
@@ -772,6 +778,8 @@ hevc_mmu: iommu@ff9a0440 {
                      <0x0 0xff9a0480 0x0 0x40>;
                interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
                interrupt-names = "hevc_mmu";
+               clocks = <&cru ACLK_VIDEO>, <&cru HCLK_VIDEO>;
+               clock-names = "aclk", "iface";
                #iommu-cells = <0>;
                status = "disabled";
        };
@@ -782,6 +790,8 @@ vpu_mmu: iommu@ff9a0800 {
                interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
                             <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
                interrupt-names = "vepu_mmu", "vdpu_mmu";
+               clocks = <&cru ACLK_VIDEO>, <&cru HCLK_VIDEO>;
+               clock-names = "aclk", "iface";
                #iommu-cells = <0>;
                status = "disabled";
        };
index e4a054a446d54a3a59aac07b7711386a54f07865..e0040b648f4330909066b23fe2129e36435603d6 100644 (file)
@@ -1236,6 +1236,8 @@ vpu_mmu: iommu@ff650800 {
                reg = <0x0 0xff650800 0x0 0x40>;
                interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH 0>;
                interrupt-names = "vpu_mmu";
+               clocks = <&cru ACLK_VCODEC>, <&cru HCLK_VCODEC>;
+               clock-names = "aclk", "iface";
                #iommu-cells = <0>;
                status = "disabled";
        };
@@ -1245,6 +1247,8 @@ vdec_mmu: iommu@ff660480 {
                reg = <0x0 0xff660480 0x0 0x40>, <0x0 0xff6604c0 0x0 0x40>;
                interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH 0>;
                interrupt-names = "vdec_mmu";
+               clocks = <&cru ACLK_VDU>, <&cru HCLK_VDU>;
+               clock-names = "aclk", "iface";
                #iommu-cells = <0>;
                status = "disabled";
        };
@@ -1254,6 +1258,8 @@ iep_mmu: iommu@ff670800 {
                reg = <0x0 0xff670800 0x0 0x40>;
                interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH 0>;
                interrupt-names = "iep_mmu";
+               clocks = <&cru ACLK_IEP>, <&cru HCLK_IEP>;
+               clock-names = "aclk", "iface";
                #iommu-cells = <0>;
                status = "disabled";
        };
@@ -1605,7 +1611,7 @@ vopl_mmu: iommu@ff8f3f00 {
                interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH 0>;
                interrupt-names = "vopl_mmu";
                clocks = <&cru ACLK_VOP1>, <&cru HCLK_VOP1>;
-               clock-names = "aclk", "hclk";
+               clock-names = "aclk", "iface";
                power-domains = <&power RK3399_PD_VOPL>;
                #iommu-cells = <0>;
                status = "disabled";
@@ -1662,7 +1668,7 @@ vopb_mmu: iommu@ff903f00 {
                interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH 0>;
                interrupt-names = "vopb_mmu";
                clocks = <&cru ACLK_VOP0>, <&cru HCLK_VOP0>;
-               clock-names = "aclk", "hclk";
+               clock-names = "aclk", "iface";
                power-domains = <&power RK3399_PD_VOPB>;
                #iommu-cells = <0>;
                status = "disabled";
@@ -1673,6 +1679,8 @@ isp0_mmu: iommu@ff914000 {
                reg = <0x0 0xff914000 0x0 0x100>, <0x0 0xff915000 0x0 0x100>;
                interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH 0>;
                interrupt-names = "isp0_mmu";
+               clocks = <&cru ACLK_ISP0_NOC>, <&cru HCLK_ISP0_NOC>;
+               clock-names = "aclk", "iface";
                #iommu-cells = <0>;
                rockchip,disable-mmu-reset;
                status = "disabled";
@@ -1683,6 +1691,8 @@ isp1_mmu: iommu@ff924000 {
                reg = <0x0 0xff924000 0x0 0x100>, <0x0 0xff925000 0x0 0x100>;
                interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH 0>;
                interrupt-names = "isp1_mmu";
+               clocks = <&cru ACLK_ISP1_NOC>, <&cru HCLK_ISP1_NOC>;
+               clock-names = "aclk", "iface";
                #iommu-cells = <0>;
                rockchip,disable-mmu-reset;
                status = "disabled";