]> asedeno.scripts.mit.edu Git - linux.git/commitdiff
arm64: tegra: Fix insecure SMMU users for Tegra186
authorJonathan Hunter <jonathanh@nvidia.com>
Thu, 2 May 2019 13:27:21 +0000 (14:27 +0100)
committerThierry Reding <treding@nvidia.com>
Wed, 8 May 2019 12:42:51 +0000 (14:42 +0200)
Commit 954a03be033c ("iommu/arm-smmu: Break insecure users by disabling
bypass by default") intentionally breaks all devices using the SMMU in
bypass mode. This is breaking various devices on Tegra186 which include
the ethernet, BPMP and HDA device. Fix this by populating the iommus
property for these devices with their stream ID.

Fixes: 954a03be033c ("iommu/arm-smmu: Break insecure users by disabling bypass by default")
Signed-off-by: Jonathan Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
arch/arm64/boot/dts/nvidia/tegra186.dtsi

index f0bb6ced49765761293d185e80238a794f18cbb8..3fb60f6f3a93b31685abc17d2799c6427e07e3e9 100644 (file)
@@ -60,6 +60,7 @@ ethernet@2490000 {
                clock-names = "master_bus", "slave_bus", "rx", "tx", "ptp_ref";
                resets = <&bpmp TEGRA186_RESET_EQOS>;
                reset-names = "eqos";
+               iommus = <&smmu TEGRA186_SID_EQOS>;
                status = "disabled";
 
                snps,write-requests = <1>;
@@ -338,6 +339,7 @@ hda@3510000 {
                         <&bpmp TEGRA186_RESET_HDA2CODEC_2X>;
                reset-names = "hda", "hda2hdmi", "hda2codec_2x";
                power-domains = <&bpmp TEGRA186_POWER_DOMAIN_DISP>;
+               iommus = <&smmu TEGRA186_SID_HDA>;
                status = "disabled";
        };
 
@@ -1158,6 +1160,7 @@ cpu@5 {
 
        bpmp: bpmp {
                compatible = "nvidia,tegra186-bpmp";
+               iommus = <&smmu TEGRA186_SID_BPMP>;
                mboxes = <&hsp_top0 TEGRA_HSP_MBOX_TYPE_DB
                                    TEGRA_HSP_DB_MASTER_BPMP>;
                shmem = <&cpu_bpmp_tx &cpu_bpmp_rx>;