]> asedeno.scripts.mit.edu Git - linux.git/commitdiff
ARM: STi: STIH416: Add IR support.
authorSrinivas Kandagatla <srinivas.kandagatla@st.com>
Mon, 11 Nov 2013 13:20:44 +0000 (13:20 +0000)
committerSrinivas Kandagatla <srinivas.kandagatla@st.com>
Tue, 11 Mar 2014 10:04:38 +0000 (10:04 +0000)
This patch adds IRB support to STiH416 platforms.

Tested on B2000 and B2020 development board

Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@st.com>
arch/arm/boot/dts/stih416-pinctrl.dtsi
arch/arm/boot/dts/stih416.dtsi

index 77b7725c10751d24333ca37c9f746f61b3cbe7f8..e7f8b5f4460aed87c2f3254df51a2612125d76b7 100644 (file)
@@ -106,6 +106,13 @@ PIO40: gpio@fe615000 {
                                st,retime-pin-mask = <0x7f>;
                        };
 
+                       rc{
+                               pinctrl_ir: ir0 {
+                                       st,pins {
+                                               ir = <&PIO4 0 ALT2 IN>;
+                                       };
+                               };
+                       };
                        sbc_serial1 {
                                pinctrl_sbc_serial1: sbc_serial1 {
                                        st,pins {
index a96055b12a99aef03cdc212522027514ffd7f5df..8299a7b8fee8de0c77dae225c7e63637173092db 100644 (file)
@@ -200,5 +200,17 @@ ethernet1: dwmac@fef08000 {
                        clock-names     = "stmmaceth";
                        clocks          = <&CLK_S_ETH1_PHY>;
                };
+
+               rc: rc@fe518000 {
+                       compatible      = "st,comms-irb";
+                       reg             = <0xfe518000 0x234>;
+                       interrupts      =  <0 203 0>;
+                       rx-mode         = "infrared";
+                       clocks          = <&CLK_SYSIN>;
+                       pinctrl-names   = "default";
+                       pinctrl-0       = <&pinctrl_ir>;
+                       resets          = <&softreset STIH416_IRB_SOFTRESET>;
+               };
+
        };
 };