drm/dp: Bit definition for D3 power state that keeps AUX fully powered

DPCD 600h - SET_POWER & SET_DP_PWR_VOLTAGE defines power state

101 = Set Main-Link for local Sink device and all downstream Sink
devices to D3 (power-down mode), keep AUX block fully powered, ready to
reply within a Response Timeout period of 300us.

This state is useful in a MST dock + MST monitor configuration that
doesn't wake up from D3 state.

v2: Use spaces instead of tabs (Jani)

Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/1502475008-2035-1-git-send-email-dhinakaran.pandiyan@intel.com

diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h
index 11c39f15f1b32b2eb61a21fda7573008d4d54d5a..d9bcc0861fba83fc809266c1655704a6e88cfcff 100644 (file)
--- a/include/drm/drm_dp_helper.h
+++ b/include/drm/drm_dp_helper.h
@@ -618,6 +618,7 @@
 # define DP_SET_POWER_D0                    0x1
 # define DP_SET_POWER_D3                    0x2
 # define DP_SET_POWER_MASK                  0x3
+# define DP_SET_POWER_D3_AUX_ON             0x5
 
 #define DP_EDP_DPCD_REV                            0x700    /* eDP 1.2 */
 # define DP_EDP_11                         0x00