clk: ti: add generic support for clock latching

Certain clocks require latching to be done, so that the actual
settings get updated on the HW that generates the clock signal.
One example of such a clock is the dra76x GMAC DPLL H14 output,
which requires its divider settings to be latched when updated.

Signed-off-by: Tero Kristo <t-kristo@ti.com>

diff --git a/drivers/clk/ti/clk.c b/drivers/clk/ti/clk.c
index 4efa2c9ea908896ba4090b3f0c64cd39d2b7b4ec..7d22e1af224770d7084cd7d8ec29e24d3f87368f 100644 (file)
--- a/drivers/clk/ti/clk.c
+++ b/drivers/clk/ti/clk.c
@@ -275,6 +275,20 @@ int ti_clk_get_reg_addr(struct device_node *node, int index,
        return 0;
 }
 
+void ti_clk_latch(struct clk_omap_reg *reg, s8 shift)
+{
+       u32 latch;
+
+       if (shift < 0)
+               return;
+
+       latch = 1 << shift;
+
+       ti_clk_ll_ops->clk_rmw(latch, latch, reg);
+       ti_clk_ll_ops->clk_rmw(0, latch, reg);
+       ti_clk_ll_ops->clk_readl(reg); /* OCP barrier */
+}
+
 /**
  * omap2_clk_provider_init - init master clock provider
  * @parent: master node

diff --git a/drivers/clk/ti/clock.h b/drivers/clk/ti/clock.h
index d9b43bfc25325687302876374d8e9e337a315eec..2f8af8fd886af45e9b4bbc56666739de260f885b 100644 (file)
--- a/drivers/clk/ti/clock.h
+++ b/drivers/clk/ti/clock.h
@@ -194,6 +194,8 @@ struct clk *ti_clk_register(struct device *dev, struct clk_hw *hw,
 int ti_clk_add_alias(struct device *dev, struct clk *clk, const char *con);
 void ti_clk_add_aliases(void);
 
+void ti_clk_latch(struct clk_omap_reg *reg, s8 shift);
+
 struct clk_hw *ti_clk_build_component_mux(struct ti_clk_mux *setup);
 
 int ti_clk_parse_divider_data(int *div_table, int num_dividers, int max_div,