arm64: dts: uniphier: add cdns, phy-dll-delay-sdclk(-hsmmc) for eMMC

Adjust the PHY parameters for more stable access to the eMMC device.
Set the SDCLK output delay value to 21 (including HS200/400 modes).

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

diff --git a/arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi b/arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi
index 42f1803cce18e87aabd24ee9603431c8fd01b718..25a525c7a4728a25d63703222b58b3ab0f74ba49 100644 (file)
--- a/arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi
+++ b/arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi
@@ -313,6 +313,8 @@ emmc: sdhc@5a000000 {
                        cdns,phy-input-delay-legacy = <4>;
                        cdns,phy-input-delay-mmc-highspeed = <2>;
                        cdns,phy-input-delay-mmc-ddr = <3>;
+                       cdns,phy-dll-delay-sdclk = <21>;
+                       cdns,phy-dll-delay-sdclk-hsmmc = <21>;
                };
 
                usb0: usb@5a800100 {

diff --git a/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi b/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi
index e4499ff37d516d5842a6c5524857259f2ad21312..c85e6e2465332f9aebb9102b0ac9de26c2af210d 100644 (file)
--- a/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi
+++ b/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi
@@ -387,6 +387,8 @@ emmc: sdhc@5a000000 {
                        cdns,phy-input-delay-legacy = <4>;
                        cdns,phy-input-delay-mmc-highspeed = <2>;
                        cdns,phy-input-delay-mmc-ddr = <3>;
+                       cdns,phy-dll-delay-sdclk = <21>;
+                       cdns,phy-dll-delay-sdclk-hsmmc = <21>;
                };
 
                soc-glue@5f800000 {