usb: dwc2: Add support for STM32F429/439/469 USB OTG HS/FS in FS mode (internal PHY)

This patch introduces a new parameter to activate USB OTG HS/FS core
embedded phy transceiver. The STM32F4x9 SoC uses the GGPIO register
to enable the transceiver.
Also add the dwc2_set_params function for stm32f4 otg fs.

Acked-by: John Youn <johnyoun@synopsys.com>
Signed-off-by: Bruno Herrera <bruherrera@gmail.com>
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>

diff --git a/drivers/usb/dwc2/core.h b/drivers/usb/dwc2/core.h
index 1a7e8300508251f8b0c2a7274acadc63c9c42111..8367d4f985c1220773a7c6efc38df94d837c7f28 100644 (file)
--- a/drivers/usb/dwc2/core.h
+++ b/drivers/usb/dwc2/core.h
@@ -423,6 +423,10 @@ enum dwc2_ep0_state {
  *                     needed.
  *                     0 - No (default)
  *                     1 - Yes
+ * @activate_stm_fs_transceiver: Activate internal transceiver using GGPIO
+ *                     register.
+ *                     0 - Deactivate the transceiver (default)
+ *                     1 - Activate the transceiver
  * @g_dma:              Enables gadget dma usage (default: autodetect).
  * @g_dma_desc:         Enables gadget descriptor DMA (default: autodetect).
  * @g_rx_fifo_size:    The periodic rx fifo size for the device, in
@@ -477,6 +481,7 @@ struct dwc2_core_params {
        bool uframe_sched;
        bool external_id_pin_ctl;
        bool hibernation;
+       bool activate_stm_fs_transceiver;
        u16 max_packet_count;
        u32 max_transfer_size;
        u32 ahbcfg;

diff --git a/drivers/usb/dwc2/hcd.c b/drivers/usb/dwc2/hcd.c
index 91ed5b61a6d90bcb42265ab0dbc36fbaeb5c65b3..740c7e86d31b912bf0f3c861a687b369acdc5b3d 100644 (file)
--- a/drivers/usb/dwc2/hcd.c
+++ b/drivers/usb/dwc2/hcd.c
@@ -121,7 +121,7 @@ static void dwc2_init_fs_ls_pclk_sel(struct dwc2_hsotg *hsotg)
 
 static int dwc2_fs_phy_init(struct dwc2_hsotg *hsotg, bool select_phy)
 {
-       u32 usbcfg, i2cctl;
+       u32 usbcfg, ggpio, i2cctl;
        int retval = 0;
 
        /*
@@ -145,6 +145,19 @@ static int dwc2_fs_phy_init(struct dwc2_hsotg *hsotg, bool select_phy)
                                return retval;
                        }
                }
+
+               if (hsotg->params.activate_stm_fs_transceiver) {
+                       ggpio = dwc2_readl(hsotg->regs + GGPIO);
+                       if (!(ggpio & GGPIO_STM32_OTG_GCCFG_PWRDWN)) {
+                               dev_dbg(hsotg->dev, "Activating transceiver\n");
+                               /*
+                                * STM32F4x9 uses the GGPIO register as general
+                                * core configuration register.
+                                */
+                               ggpio |= GGPIO_STM32_OTG_GCCFG_PWRDWN;
+                               dwc2_writel(ggpio, hsotg->regs + GGPIO);
+                       }
+               }
        }
 
        /*

diff --git a/drivers/usb/dwc2/hw.h b/drivers/usb/dwc2/hw.h
index bde72489ae6625b7a666f9a6e8c79e895d4d1441..4592012c47436c422e4840761717b48929e239bc 100644 (file)
--- a/drivers/usb/dwc2/hw.h
+++ b/drivers/usb/dwc2/hw.h
@@ -225,6 +225,8 @@
 
 #define GPVNDCTL                       HSOTG_REG(0x0034)
 #define GGPIO                          HSOTG_REG(0x0038)
+#define GGPIO_STM32_OTG_GCCFG_PWRDWN   BIT(16)
+
 #define GUID                           HSOTG_REG(0x003c)
 #define GSNPSID                                HSOTG_REG(0x0040)
 #define GHWCFG1                                HSOTG_REG(0x0044)

diff --git a/drivers/usb/dwc2/params.c b/drivers/usb/dwc2/params.c
index 2990c347289fcd877b831d12cc7372ee5f2b1166..9cd8722f24f65994d83cdb0378387c021e773e5f 100644 (file)
--- a/drivers/usb/dwc2/params.c
+++ b/drivers/usb/dwc2/params.c
@@ -120,6 +120,22 @@ static void dwc2_set_amcc_params(struct dwc2_hsotg *hsotg)
        p->ahbcfg = GAHBCFG_HBSTLEN_INCR16 << GAHBCFG_HBSTLEN_SHIFT;
 }
 
+static void dwc2_set_stm32f4x9_fsotg_params(struct dwc2_hsotg *hsotg)
+{
+       struct dwc2_core_params *p = &hsotg->params;
+
+       p->otg_cap = DWC2_CAP_PARAM_NO_HNP_SRP_CAPABLE;
+       p->speed = DWC2_SPEED_PARAM_FULL;
+       p->host_rx_fifo_size = 128;
+       p->host_nperio_tx_fifo_size = 96;
+       p->host_perio_tx_fifo_size = 96;
+       p->max_packet_count = 256;
+       p->phy_type = DWC2_PHY_TYPE_PARAM_FS;
+       p->i2c_enable = false;
+       p->uframe_sched = false;
+       p->activate_stm_fs_transceiver = true;
+}
+
 const struct of_device_id dwc2_of_match_table[] = {
        { .compatible = "brcm,bcm2835-usb", .data = dwc2_set_bcm_params },
        { .compatible = "hisilicon,hi6220-usb", .data = dwc2_set_his_params  },
@@ -133,6 +149,9 @@ const struct of_device_id dwc2_of_match_table[] = {
        { .compatible = "amlogic,meson-gxbb-usb",
          .data = dwc2_set_amlogic_params },
        { .compatible = "amcc,dwc-otg", .data = dwc2_set_amcc_params },
+       { .compatible = "st,stm32f4x9-fsotg",
+         .data = dwc2_set_stm32f4x9_fsotg_params },
+       { .compatible = "st,stm32f4x9-hsotg" },
        {},
 };
 MODULE_DEVICE_TABLE(of, dwc2_of_match_table);