]> asedeno.scripts.mit.edu Git - linux.git/commitdiff
ARM: dts: sunxi: Add missing cooling device properties for CPUs
authorViresh Kumar <viresh.kumar@linaro.org>
Tue, 5 Jun 2018 04:47:49 +0000 (10:17 +0530)
committerMaxime Ripard <maxime.ripard@bootlin.com>
Mon, 18 Jun 2018 07:29:22 +0000 (09:29 +0200)
The cooling device properties, like "#cooling-cells" and
"dynamic-power-coefficient", should either be present for all the CPUs
of a cluster or none. If these are present only for a subset of CPUs of
a cluster then things will start falling apart as soon as the CPUs are
brought online in a different order. For example, this will happen
because the operating system looks for such properties in the CPU node
it is trying to bring up, so that it can register a cooling device.

Add such missing properties.

Fix other missing properties (clocks, OPP, clock latency) as well to
make it all work.

Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
arch/arm/boot/dts/sun6i-a31.dtsi
arch/arm/boot/dts/sun7i-a20.dtsi
arch/arm/boot/dts/sun8i-a33.dtsi

index c72992556a86857098deca7ff69a84379d27c6bf..debc0bf22ea3b063192e458140bcab68ad10e6a5 100644 (file)
@@ -119,18 +119,48 @@ cpu@1 {
                        compatible = "arm,cortex-a7";
                        device_type = "cpu";
                        reg = <1>;
+                       clocks = <&ccu CLK_CPU>;
+                       clock-latency = <244144>; /* 8 32k periods */
+                       operating-points = <
+                               /* kHz    uV */
+                               1008000 1200000
+                               864000  1200000
+                               720000  1100000
+                               480000  1000000
+                               >;
+                       #cooling-cells = <2>;
                };
 
                cpu@2 {
                        compatible = "arm,cortex-a7";
                        device_type = "cpu";
                        reg = <2>;
+                       clocks = <&ccu CLK_CPU>;
+                       clock-latency = <244144>; /* 8 32k periods */
+                       operating-points = <
+                               /* kHz    uV */
+                               1008000 1200000
+                               864000  1200000
+                               720000  1100000
+                               480000  1000000
+                               >;
+                       #cooling-cells = <2>;
                };
 
                cpu@3 {
                        compatible = "arm,cortex-a7";
                        device_type = "cpu";
                        reg = <3>;
+                       clocks = <&ccu CLK_CPU>;
+                       clock-latency = <244144>; /* 8 32k periods */
+                       operating-points = <
+                               /* kHz    uV */
+                               1008000 1200000
+                               864000  1200000
+                               720000  1100000
+                               480000  1000000
+                               >;
+                       #cooling-cells = <2>;
                };
        };
 
index e529e4ff21749b31d83a0690f2e7ada3afb7f5d1..35372a0cfc8d3387ee290d681584ff9f7e4ec0a7 100644 (file)
@@ -122,6 +122,19 @@ cpu@1 {
                        compatible = "arm,cortex-a7";
                        device_type = "cpu";
                        reg = <1>;
+                       clocks = <&ccu CLK_CPU>;
+                       clock-latency = <244144>; /* 8 32k periods */
+                       operating-points = <
+                               /* kHz    uV */
+                               960000  1400000
+                               912000  1400000
+                               864000  1300000
+                               720000  1200000
+                               528000  1100000
+                               312000  1000000
+                               144000  1000000
+                               >;
+                       #cooling-cells = <2>;
                };
        };
 
index 8d278ee001e97a63b40143393b7d044ac3f7d5cf..4e92741b24a70e222992f977e94d4f09d4486f41 100644 (file)
@@ -132,21 +132,30 @@ cpu@0 {
                };
 
                cpu@1 {
+                       clocks = <&ccu CLK_CPUX>;
+                       clock-names = "cpu";
                        operating-points-v2 = <&cpu0_opp_table>;
+                       #cooling-cells = <2>;
                };
 
                cpu@2 {
                        compatible = "arm,cortex-a7";
                        device_type = "cpu";
                        reg = <2>;
+                       clocks = <&ccu CLK_CPUX>;
+                       clock-names = "cpu";
                        operating-points-v2 = <&cpu0_opp_table>;
+                       #cooling-cells = <2>;
                };
 
                cpu@3 {
                        compatible = "arm,cortex-a7";
                        device_type = "cpu";
                        reg = <3>;
+                       clocks = <&ccu CLK_CPUX>;
+                       clock-names = "cpu";
                        operating-points-v2 = <&cpu0_opp_table>;
+                       #cooling-cells = <2>;
                };
        };