]> asedeno.scripts.mit.edu Git - linux.git/commitdiff
pinctrl: tegra: use signed bitfields for optional fields
authorStefan Agner <stefan@agner.ch>
Mon, 16 Mar 2015 21:42:34 +0000 (22:42 +0100)
committerLinus Walleij <linus.walleij@linaro.org>
Thu, 19 Mar 2015 08:20:17 +0000 (09:20 +0100)
Optional fields are set to -1 by various preprocessor macros. Make
sure the fields can actually store them.

Signed-off-by: Stefan Agner <stefan@agner.ch>
Acked-by: Stephen Warren <swarren@nvidia.com>
Tested-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
drivers/pinctrl/pinctrl-tegra.h

index d54ab9d387924b272803e20da79490d4fede431d..1615db7e3a4bd065dcedc059b8041e0a0c782cbf 100644 (file)
@@ -139,26 +139,26 @@ struct tegra_pingroup {
        u32 pupd_bank:2;
        u32 tri_bank:2;
        u32 drv_bank:2;
-       u32 mux_bit:6;
-       u32 pupd_bit:6;
-       u32 tri_bit:6;
-       u32 einput_bit:6;
-       u32 odrain_bit:6;
-       u32 lock_bit:6;
-       u32 ioreset_bit:6;
-       u32 rcv_sel_bit:6;
-       u32 hsm_bit:6;
-       u32 schmitt_bit:6;
-       u32 lpmd_bit:6;
-       u32 drvdn_bit:6;
-       u32 drvup_bit:6;
-       u32 slwr_bit:6;
-       u32 slwf_bit:6;
-       u32 drvtype_bit:6;
-       u32 drvdn_width:6;
-       u32 drvup_width:6;
-       u32 slwr_width:6;
-       u32 slwf_width:6;
+       s32 mux_bit:6;
+       s32 pupd_bit:6;
+       s32 tri_bit:6;
+       s32 einput_bit:6;
+       s32 odrain_bit:6;
+       s32 lock_bit:6;
+       s32 ioreset_bit:6;
+       s32 rcv_sel_bit:6;
+       s32 hsm_bit:6;
+       s32 schmitt_bit:6;
+       s32 lpmd_bit:6;
+       s32 drvdn_bit:6;
+       s32 drvup_bit:6;
+       s32 slwr_bit:6;
+       s32 slwf_bit:6;
+       s32 drvtype_bit:6;
+       s32 drvdn_width:6;
+       s32 drvup_width:6;
+       s32 slwr_width:6;
+       s32 slwf_width:6;
 };
 
 /**