]> asedeno.scripts.mit.edu Git - linux.git/commitdiff
drm/i915/guc: Drop legacy workarounds from guc_prepare_xfer
authorMichal Wajdeczko <michal.wajdeczko@intel.com>
Fri, 3 Nov 2017 15:18:14 +0000 (15:18 +0000)
committerChris Wilson <chris@chris-wilson.co.uk>
Wed, 8 Nov 2017 21:34:16 +0000 (21:34 +0000)
We don't keep the workarounds for pre-production hardware
(see intel_detect_preproduction_hw) thus we can drop some
extra steps during firmware upload needed only for unsupported
platforms.

Suggested-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Cc: Sagar Arun Kamble <sagar.a.kamble@intel.com>
Reviewed-by: Sagar Arun Kamble <sagar.a.kamble@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20171103151816.62048-3-michal.wajdeczko@intel.com
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
drivers/gpu/drm/i915/intel_guc_fw.c

index 74a61fe9448cc8a68165148b1b27733a447e6883..a63b5cf7421a2700329d41e05ebb0902d1528153 100644 (file)
@@ -104,16 +104,6 @@ static void guc_prepare_xfer(struct intel_guc *guc)
        /* Enable MIA caching. GuC clock gating is disabled. */
        I915_WRITE(GUC_SHIM_CONTROL, GUC_SHIM_CONTROL_VALUE);
 
-       /* WaDisableMinuteIaClockGating:bxt */
-       if (IS_BXT_REVID(dev_priv, 0, BXT_REVID_A1)) {
-               I915_WRITE(GUC_SHIM_CONTROL, (I915_READ(GUC_SHIM_CONTROL) &
-                                             ~GUC_ENABLE_MIA_CLOCK_GATING));
-       }
-
-       /* WaC6DisallowByGfxPause:bxt */
-       if (IS_BXT_REVID(dev_priv, 0, BXT_REVID_B0))
-               I915_WRITE(GEN6_GFXPAUSE, 0x30FFF);
-
        if (IS_GEN9_LP(dev_priv))
                I915_WRITE(GEN9LP_GT_PM_CONFIG, GT_DOORBELL_ENABLE);
        else