]> asedeno.scripts.mit.edu Git - linux.git/commitdiff
drm/amdgpu: move atom scratch register save/restore to common code
authorAlex Deucher <alexander.deucher@amd.com>
Wed, 19 Oct 2016 18:40:58 +0000 (14:40 -0400)
committerAlex Deucher <alexander.deucher@amd.com>
Fri, 21 Oct 2016 15:18:11 +0000 (11:18 -0400)
We need this for more than just DCE.  Move it out of the DCE modules
and into the device code.  This way we can be sure the scratch registers
are initialized properly before we run asic_init which happens before
DCE IPs are restored.

Fixes atombios hangs in asic_init.

Reviewed-by: JimQu <Jim.Qu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
drivers/gpu/drm/amd/amdgpu/dce_v10_0.c
drivers/gpu/drm/amd/amdgpu/dce_v11_0.c
drivers/gpu/drm/amd/amdgpu/dce_v6_0.c
drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

index 2b0267494bca0320f2399f661df55aa8f42829b4..7ca07e7b25c10c4e20536ba039c1e8d9a80c12bf 100644 (file)
@@ -1959,6 +1959,7 @@ int amdgpu_device_suspend(struct drm_device *dev, bool suspend, bool fbcon)
        /* evict remaining vram memory */
        amdgpu_bo_evict_vram(adev);
 
+       amdgpu_atombios_scratch_regs_save(adev);
        pci_save_state(dev->pdev);
        if (suspend) {
                /* Shut down the device */
@@ -2010,6 +2011,7 @@ int amdgpu_device_resume(struct drm_device *dev, bool resume, bool fbcon)
                        return r;
                }
        }
+       amdgpu_atombios_scratch_regs_restore(adev);
 
        /* post card */
        if (!amdgpu_card_posted(adev) || !resume) {
@@ -2277,8 +2279,9 @@ int amdgpu_gpu_reset(struct amdgpu_device *adev)
                        amdgpu_display_stop_mc_access(adev, &save);
                        amdgpu_wait_for_idle(adev, AMD_IP_BLOCK_TYPE_GMC);
                }
-
+               amdgpu_atombios_scratch_regs_save(adev);
                r = amdgpu_asic_reset(adev);
+               amdgpu_atombios_scratch_regs_restore(adev);
                /* post card */
                amdgpu_atom_asic_init(adev->mode_info.atom_context);
 
index 4108c686aa7c20619bcbe33d430dc8cbbc6fcbe7..9260caef74fa07f7045f1bbc30e5481bb6f5558e 100644 (file)
@@ -3151,10 +3151,6 @@ static int dce_v10_0_hw_fini(void *handle)
 
 static int dce_v10_0_suspend(void *handle)
 {
-       struct amdgpu_device *adev = (struct amdgpu_device *)handle;
-
-       amdgpu_atombios_scratch_regs_save(adev);
-
        return dce_v10_0_hw_fini(handle);
 }
 
@@ -3165,8 +3161,6 @@ static int dce_v10_0_resume(void *handle)
 
        ret = dce_v10_0_hw_init(handle);
 
-       amdgpu_atombios_scratch_regs_restore(adev);
-
        /* turn on the BL */
        if (adev->mode_info.bl_encoder) {
                u8 bl_level = amdgpu_display_backlight_get_level(adev,
index f264b8f17ad1b302ebb51f0f37a1805655529470..367739bd19279fa5f968675b54733bad289b65e0 100644 (file)
@@ -3215,10 +3215,6 @@ static int dce_v11_0_hw_fini(void *handle)
 
 static int dce_v11_0_suspend(void *handle)
 {
-       struct amdgpu_device *adev = (struct amdgpu_device *)handle;
-
-       amdgpu_atombios_scratch_regs_save(adev);
-
        return dce_v11_0_hw_fini(handle);
 }
 
@@ -3229,8 +3225,6 @@ static int dce_v11_0_resume(void *handle)
 
        ret = dce_v11_0_hw_init(handle);
 
-       amdgpu_atombios_scratch_regs_restore(adev);
-
        /* turn on the BL */
        if (adev->mode_info.bl_encoder) {
                u8 bl_level = amdgpu_display_backlight_get_level(adev,
index b948d6cb139936670228d6a9e805ecd7fbe9b225..15f9fc0514b29b800f1fb5c83cfd3f43ea52ec04 100644 (file)
@@ -2482,10 +2482,6 @@ static int dce_v6_0_hw_fini(void *handle)
 
 static int dce_v6_0_suspend(void *handle)
 {
-       struct amdgpu_device *adev = (struct amdgpu_device *)handle;
-
-       amdgpu_atombios_scratch_regs_save(adev);
-
        return dce_v6_0_hw_fini(handle);
 }
 
@@ -2496,8 +2492,6 @@ static int dce_v6_0_resume(void *handle)
 
        ret = dce_v6_0_hw_init(handle);
 
-       amdgpu_atombios_scratch_regs_restore(adev);
-
        /* turn on the BL */
        if (adev->mode_info.bl_encoder) {
                u8 bl_level = amdgpu_display_backlight_get_level(adev,
index 5966166ec94c886d48035f1492b42ea89a24d354..8c4d808db0f1279af1b5a0c05e364c6e6c07bdfd 100644 (file)
@@ -3033,10 +3033,6 @@ static int dce_v8_0_hw_fini(void *handle)
 
 static int dce_v8_0_suspend(void *handle)
 {
-       struct amdgpu_device *adev = (struct amdgpu_device *)handle;
-
-       amdgpu_atombios_scratch_regs_save(adev);
-
        return dce_v8_0_hw_fini(handle);
 }
 
@@ -3047,8 +3043,6 @@ static int dce_v8_0_resume(void *handle)
 
        ret = dce_v8_0_hw_init(handle);
 
-       amdgpu_atombios_scratch_regs_restore(adev);
-
        /* turn on the BL */
        if (adev->mode_info.bl_encoder) {
                u8 bl_level = amdgpu_display_backlight_get_level(adev,