]> asedeno.scripts.mit.edu Git - linux.git/commitdiff
drm/amd: Interface change to support 64 bit page_table_base
authorShaoyun Liu <Shaoyun.Liu@amd.com>
Tue, 13 Mar 2018 21:44:09 +0000 (17:44 -0400)
committerAlex Deucher <alexander.deucher@amd.com>
Thu, 27 Sep 2018 02:09:17 +0000 (21:09 -0500)
amdgpu_gpuvm_get_process_page_dir should return the page table address
in the format expected by the pm4_map_process packet for all ASIC
generations.

Signed-off-by: Shaoyun Liu <Shaoyun.Liu@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.h
drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v7.c
drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8.c
drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c
drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c
drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c
drivers/gpu/drm/amd/amdkfd/kfd_kernel_queue_v9.c
drivers/gpu/drm/amd/amdkfd/kfd_priv.h
drivers/gpu/drm/amd/include/kgd_kfd_interface.h

index 056fc6ef6c63b1338f4ae39fb3475576ed9f9308..8e0d4f7196b4f483818ad951df7f59e8e0b0f60f 100644 (file)
@@ -174,7 +174,7 @@ void amdgpu_amdkfd_gpuvm_destroy_cb(struct amdgpu_device *adev,
                                struct amdgpu_vm *vm);
 void amdgpu_amdkfd_gpuvm_destroy_process_vm(struct kgd_dev *kgd, void *vm);
 void amdgpu_amdkfd_gpuvm_release_process_vm(struct kgd_dev *kgd, void *vm);
-uint32_t amdgpu_amdkfd_gpuvm_get_process_page_dir(void *vm);
+uint64_t amdgpu_amdkfd_gpuvm_get_process_page_dir(void *vm);
 int amdgpu_amdkfd_gpuvm_alloc_memory_of_gpu(
                struct kgd_dev *kgd, uint64_t va, uint64_t size,
                void *vm, struct kgd_mem **mem,
index b2e45c8e2e0d4eb7a183cb90beadd7c9cc0b6908..244d9834a3814381e638758a091b9f8287f8b57e 100644 (file)
@@ -142,7 +142,7 @@ static uint16_t get_fw_version(struct kgd_dev *kgd, enum kgd_engine_type type);
 static void set_scratch_backing_va(struct kgd_dev *kgd,
                                        uint64_t va, uint32_t vmid);
 static void set_vm_context_page_table_base(struct kgd_dev *kgd, uint32_t vmid,
-               uint32_t page_table_base);
+               uint64_t page_table_base);
 static int invalidate_tlbs(struct kgd_dev *kgd, uint16_t pasid);
 static int invalidate_tlbs_vmid(struct kgd_dev *kgd, uint16_t vmid);
 static uint32_t read_vmid_from_vmfault_reg(struct kgd_dev *kgd);
@@ -874,7 +874,7 @@ static uint16_t get_fw_version(struct kgd_dev *kgd, enum kgd_engine_type type)
 }
 
 static void set_vm_context_page_table_base(struct kgd_dev *kgd, uint32_t vmid,
-                       uint32_t page_table_base)
+                       uint64_t page_table_base)
 {
        struct amdgpu_device *adev = get_amdgpu_device(kgd);
 
@@ -882,7 +882,8 @@ static void set_vm_context_page_table_base(struct kgd_dev *kgd, uint32_t vmid,
                pr_err("trying to set page table base for wrong VMID\n");
                return;
        }
-       WREG32(mmVM_CONTEXT8_PAGE_TABLE_BASE_ADDR + vmid - 8, page_table_base);
+       WREG32(mmVM_CONTEXT8_PAGE_TABLE_BASE_ADDR + vmid - 8,
+               lower_32_bits(page_table_base));
 }
 
 static int invalidate_tlbs(struct kgd_dev *kgd, uint16_t pasid)
index dd94b702f3a4a0b362833b324ea73857d0712385..9f149914ad6cd113343cdd6ec406fa240d9fe7c4 100644 (file)
@@ -98,7 +98,7 @@ static uint16_t get_fw_version(struct kgd_dev *kgd, enum kgd_engine_type type);
 static void set_scratch_backing_va(struct kgd_dev *kgd,
                                        uint64_t va, uint32_t vmid);
 static void set_vm_context_page_table_base(struct kgd_dev *kgd, uint32_t vmid,
-               uint32_t page_table_base);
+               uint64_t page_table_base);
 static int invalidate_tlbs(struct kgd_dev *kgd, uint16_t pasid);
 static int invalidate_tlbs_vmid(struct kgd_dev *kgd, uint16_t vmid);
 
@@ -833,7 +833,7 @@ static uint16_t get_fw_version(struct kgd_dev *kgd, enum kgd_engine_type type)
 }
 
 static void set_vm_context_page_table_base(struct kgd_dev *kgd, uint32_t vmid,
-               uint32_t page_table_base)
+               uint64_t page_table_base)
 {
        struct amdgpu_device *adev = get_amdgpu_device(kgd);
 
@@ -841,7 +841,8 @@ static void set_vm_context_page_table_base(struct kgd_dev *kgd, uint32_t vmid,
                pr_err("trying to set page table base for wrong VMID\n");
                return;
        }
-       WREG32(mmVM_CONTEXT8_PAGE_TABLE_BASE_ADDR + vmid - 8, page_table_base);
+       WREG32(mmVM_CONTEXT8_PAGE_TABLE_BASE_ADDR + vmid - 8,
+                       lower_32_bits(page_table_base));
 }
 
 static int invalidate_tlbs(struct kgd_dev *kgd, uint16_t pasid)
index c9176537550bbbccbc50d81e62155097cd62dccb..42cb4c4e0929150de17d2056dbb055883e642157 100644 (file)
@@ -138,7 +138,7 @@ static bool get_atc_vmid_pasid_mapping_valid(struct kgd_dev *kgd,
 static uint16_t get_atc_vmid_pasid_mapping_pasid(struct kgd_dev *kgd,
                uint8_t vmid);
 static void set_vm_context_page_table_base(struct kgd_dev *kgd, uint32_t vmid,
-               uint32_t page_table_base);
+               uint64_t page_table_base);
 static uint16_t get_fw_version(struct kgd_dev *kgd, enum kgd_engine_type type);
 static void set_scratch_backing_va(struct kgd_dev *kgd,
                                        uint64_t va, uint32_t vmid);
@@ -1013,11 +1013,10 @@ static uint16_t get_fw_version(struct kgd_dev *kgd, enum kgd_engine_type type)
 }
 
 static void set_vm_context_page_table_base(struct kgd_dev *kgd, uint32_t vmid,
-               uint32_t page_table_base)
+               uint64_t page_table_base)
 {
        struct amdgpu_device *adev = get_amdgpu_device(kgd);
-       uint64_t base = (uint64_t)page_table_base << PAGE_SHIFT |
-               AMDGPU_PTE_VALID;
+       uint64_t base = page_table_base | AMDGPU_PTE_VALID;
 
        if (!amdgpu_amdkfd_is_kfd_vmid(adev, vmid)) {
                pr_err("trying to set page table base for wrong VMID %u\n",
index 6ee9dc476c860aff3a0913dd7b181099da63114b..df0a059565f93aaadeec263b0999cda1fca09bcb 100644 (file)
@@ -1131,11 +1131,15 @@ void amdgpu_amdkfd_gpuvm_release_process_vm(struct kgd_dev *kgd, void *vm)
        amdgpu_vm_release_compute(adev, avm);
 }
 
-uint32_t amdgpu_amdkfd_gpuvm_get_process_page_dir(void *vm)
+uint64_t amdgpu_amdkfd_gpuvm_get_process_page_dir(void *vm)
 {
        struct amdgpu_vm *avm = (struct amdgpu_vm *)vm;
+       struct amdgpu_bo *pd = avm->root.base.bo;
+       struct amdgpu_device *adev = amdgpu_ttm_adev(pd->tbo.bdev);
 
-       return avm->pd_phys_addr >> AMDGPU_GPU_PAGE_SHIFT;
+       if (adev->asic_type < CHIP_VEGA10)
+               return avm->pd_phys_addr >> AMDGPU_GPU_PAGE_SHIFT;
+       return avm->pd_phys_addr;
 }
 
 int amdgpu_amdkfd_gpuvm_alloc_memory_of_gpu(
index 77d56efdd14e64c413cbc4dd9a7f28cbcce7ecaf..afa21679ac44d38bd8f6e2c710b359d6655b3075 100644 (file)
@@ -656,7 +656,7 @@ static int restore_process_queues_nocpsch(struct device_queue_manager *dqm,
        struct queue *q;
        struct mqd_manager *mqd_mgr;
        struct kfd_process_device *pdd;
-       uint32_t pd_base;
+       uint64_t pd_base;
        int retval = 0;
 
        pdd = qpd_to_pdd(qpd);
@@ -676,7 +676,7 @@ static int restore_process_queues_nocpsch(struct device_queue_manager *dqm,
 
        /* Update PD Base in QPD */
        qpd->page_table_base = pd_base;
-       pr_debug("Updated PD address to 0x%08x\n", pd_base);
+       pr_debug("Updated PD address to 0x%llx\n", pd_base);
 
        if (!list_empty(&qpd->queues_list)) {
                dqm->dev->kfd2kgd->set_vm_context_page_table_base(
@@ -717,7 +717,7 @@ static int restore_process_queues_cpsch(struct device_queue_manager *dqm,
 {
        struct queue *q;
        struct kfd_process_device *pdd;
-       uint32_t pd_base;
+       uint64_t pd_base;
        int retval = 0;
 
        pdd = qpd_to_pdd(qpd);
@@ -737,7 +737,7 @@ static int restore_process_queues_cpsch(struct device_queue_manager *dqm,
 
        /* Update PD Base in QPD */
        qpd->page_table_base = pd_base;
-       pr_debug("Updated PD address to 0x%08x\n", pd_base);
+       pr_debug("Updated PD address to 0x%llx\n", pd_base);
 
        /* activate all active queues on the qpd */
        list_for_each_entry(q, &qpd->queues_list, list) {
@@ -761,7 +761,7 @@ static int register_process(struct device_queue_manager *dqm,
 {
        struct device_process_node *n;
        struct kfd_process_device *pdd;
-       uint32_t pd_base;
+       uint64_t pd_base;
        int retval;
 
        n = kzalloc(sizeof(*n), GFP_KERNEL);
@@ -779,6 +779,7 @@ static int register_process(struct device_queue_manager *dqm,
 
        /* Update PD Base in QPD */
        qpd->page_table_base = pd_base;
+       pr_debug("Updated PD address to 0x%llx\n", pd_base);
 
        retval = dqm->asic_ops.update_qpd(dqm, qpd);
 
index 684a3bf07efde9fbe3b6e11110d09e5075819422..33830b1a5a5476c947f681d8172790b57a40924c 100644 (file)
@@ -71,8 +71,7 @@ static int pm_map_process_v9(struct packet_manager *pm,
                uint32_t *buffer, struct qcm_process_device *qpd)
 {
        struct pm4_mes_map_process *packet;
-       uint64_t vm_page_table_base_addr =
-               (uint64_t)(qpd->page_table_base) << 12;
+       uint64_t vm_page_table_base_addr = qpd->page_table_base;
 
        packet = (struct pm4_mes_map_process *)buffer;
        memset(buffer, 0, sizeof(struct pm4_mes_map_process));
index bf5bc6e27fb919b934812d095d22afceeb3452f2..53ff86d45d918d7e465309b9e476641332b241ef 100644 (file)
@@ -507,11 +507,11 @@ struct qcm_process_device {
         * All the memory management data should be here too
         */
        uint64_t gds_context_area;
+       uint64_t page_table_base;
        uint32_t sh_mem_config;
        uint32_t sh_mem_bases;
        uint32_t sh_mem_ape1_base;
        uint32_t sh_mem_ape1_limit;
-       uint32_t page_table_base;
        uint32_t gds_size;
        uint32_t num_gws;
        uint32_t num_oac;
index bb1dbe3331ba129dd5da76387807afe5c1c4a408..64ecffd5212663c4d1ba9c90181f7df320289db8 100644 (file)
@@ -409,9 +409,9 @@ struct kfd2kgd_calls {
                        struct dma_fence **ef);
        void (*destroy_process_vm)(struct kgd_dev *kgd, void *vm);
        void (*release_process_vm)(struct kgd_dev *kgd, void *vm);
-       uint32_t (*get_process_page_dir)(void *vm);
+       uint64_t (*get_process_page_dir)(void *vm);
        void (*set_vm_context_page_table_base)(struct kgd_dev *kgd,
-                       uint32_t vmid, uint32_t page_table_base);
+                       uint32_t vmid, uint64_t page_table_base);
        int (*alloc_memory_of_gpu)(struct kgd_dev *kgd, uint64_t va,
                        uint64_t size, void *vm,
                        struct kgd_mem **mem, uint64_t *offset,