drm/amd/display: check hpd before retry verify link cap

[why]
During detection link training if a display is disconnected,
the current code will retry 3 times of link training
on disconnected link before giving up.

[how]
Before each retry check for HPD status, only retry
verify link cap when HPD is still high.
Also put a 10ms delay between each retry to improve
the chance of success.

Signed-off-by: Wenjing Liu <Wenjing.Liu@amd.com>
Reviewed-by: Jun Lei <Jun.Lei@amd.com>
Acked-by: Abdoulaye Berthe <Abdoulaye.Berthe@amd.com>
Acked-by: Leo Li <sunpeng.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_link.c b/drivers/gpu/drm/amd/display/dc/core/dc_link.c
index 7af268c30f2637186179151e9d038fc6ece62e9c..f2d78d7b089e5b7077c1aff26b97dc5c998a89e8 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/core/dc_link.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc_link.c
@@ -854,16 +854,9 @@ bool dc_link_detect(struct dc_link *link, enum dc_detect_reason reason)
                                        dc_sink_release(prev_sink);
                                } else {
                                        /* Empty dongle plug in */
-                                       for (i = 0; i < LINK_TRAINING_MAX_VERIFY_RETRY; i++) {
-                                               int fail_count = 0;
-
-                                               dp_verify_link_cap(link,
-                                                                 &link->reported_link_cap,
-                                                                 &fail_count);
-
-                                               if (fail_count == 0)
-                                                       break;
-                                       }
+                                       dp_verify_link_cap_with_retries(link,
+                                                       &link->reported_link_cap,
+                                                       LINK_TRAINING_MAX_VERIFY_RETRY);
                                }
                                return true;
                        }
@@ -967,17 +960,9 @@ bool dc_link_detect(struct dc_link *link, enum dc_detect_reason reason)
                         */
 
                        /* deal with non-mst cases */
-                       for (i = 0; i < LINK_TRAINING_MAX_VERIFY_RETRY; i++) {
-                               int fail_count = 0;
-
-                               dp_verify_link_cap(link,
-                                                 &link->reported_link_cap,
-                                                 &fail_count);
-
-                               if (fail_count == 0)
-                                       break;
-                       }
-
+                       dp_verify_link_cap_with_retries(link,
+                                       &link->reported_link_cap,
+                                       LINK_TRAINING_MAX_VERIFY_RETRY);
                } else {
                        // If edid is the same, then discard new sink and revert back to original sink
                        if (same_edid) {

diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c b/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c
index 8e66b2e9d6af875a01b1944a8fcc1b7780db1b34..2e87942b3e9c47324f5f5065e9087e2b07f54360 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c
@@ -1643,6 +1643,33 @@ bool dp_verify_link_cap(
        return success;
 }
 
+bool dp_verify_link_cap_with_retries(
+       struct dc_link *link,
+       struct dc_link_settings *known_limit_link_setting,
+       int attempts)
+{
+       uint8_t i = 0;
+       bool success = false;
+
+       for (i = 0; i < attempts; i++) {
+               int fail_count = 0;
+               enum dc_connection_type type;
+
+               memset(&link->verified_link_cap, 0,
+                               sizeof(struct dc_link_settings));
+               if (!dc_link_detect_sink(link, &type)) {
+                       break;
+               } else if (dp_verify_link_cap(link,
+                               &link->reported_link_cap,
+                               &fail_count) && fail_count == 0) {
+                       success = true;
+                       break;
+               }
+               msleep(10);
+       }
+       return success;
+}
+
 static struct dc_link_settings get_common_supported_link_settings(
                struct dc_link_settings link_setting_a,
                struct dc_link_settings link_setting_b)

diff --git a/drivers/gpu/drm/amd/display/dc/inc/dc_link_dp.h b/drivers/gpu/drm/amd/display/dc/inc/dc_link_dp.h
index b4e7b0c56f83983068fabbcf25e6a4d7061279fa..08a4df2c61a8cb8685d395775e269d805c08a7a5 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/inc/dc_link_dp.h
+++ b/drivers/gpu/drm/amd/display/dc/inc/dc_link_dp.h
@@ -38,6 +38,11 @@ bool dp_verify_link_cap(
        struct dc_link_settings *known_limit_link_setting,
        int *fail_count);
 
+bool dp_verify_link_cap_with_retries(
+       struct dc_link *link,
+       struct dc_link_settings *known_limit_link_setting,
+       int attempts);
+
 bool dp_validate_mode_timing(
        struct dc_link *link,
        const struct dc_crtc_timing *timing);