usb: dwc3: of-simple: add support for the Amlogic Meson GXL and AXG SoCs

Amlogic Meson GXL and AXG SoCs come with a (host-only) dwc3 USB
controller. To use this controller a clock has to be enabled and a reset
line has to be pulsed.
Enabling the clock works identical to other SoCs. However, the reset
line has to be pulsed (using reset_control_reset) instead of using a
level reset (reset_control_{assert,deassert}).

Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Tested-by: Yixun Lan <yixun.lan@amlogic.com>
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>

diff --git a/drivers/usb/dwc3/dwc3-of-simple.c b/drivers/usb/dwc3/dwc3-of-simple.c
index b6d35413c00d988cbd3acc19b3c2d9076f0a1cd5..cb2ee96fd3e866378c946c8e1097ebbd087122d2 100644 (file)
--- a/drivers/usb/dwc3/dwc3-of-simple.c
+++ b/drivers/usb/dwc3/dwc3-of-simple.c
@@ -93,6 +93,12 @@ static int dwc3_of_simple_probe(struct platform_device *pdev)
        platform_set_drvdata(pdev, simple);
        simple->dev = dev;
 
+       if (of_device_is_compatible(np, "amlogic,meson-axg-dwc3") ||
+           of_device_is_compatible(np, "amlogic,meson-gxl-dwc3")) {
+               shared_resets = true;
+               simple->pulse_resets = true;
+       }
+
        simple->resets = of_reset_control_array_get(np, shared_resets, true);
        if (IS_ERR(simple->resets)) {
                ret = PTR_ERR(simple->resets);
@@ -207,6 +213,8 @@ static const struct of_device_id of_dwc3_simple_match[] = {
        { .compatible = "xlnx,zynqmp-dwc3" },
        { .compatible = "cavium,octeon-7130-usb-uctl" },
        { .compatible = "sprd,sc9860-dwc3" },
+       { .compatible = "amlogic,meson-axg-dwc3" },
+       { .compatible = "amlogic,meson-gxl-dwc3" },
        { /* Sentinel */ }
 };
 MODULE_DEVICE_TABLE(of, of_dwc3_simple_match);