]> asedeno.scripts.mit.edu Git - linux.git/commitdiff
sh/mmiowb: Add unconditional mmiowb() to arch_spin_unlock()
authorWill Deacon <will.deacon@arm.com>
Fri, 22 Feb 2019 13:37:21 +0000 (13:37 +0000)
committerWill Deacon <will.deacon@arm.com>
Mon, 8 Apr 2019 11:00:21 +0000 (12:00 +0100)
The mmiowb() macro is horribly difficult to use and drivers will continue
to work most of the time if they omit a call when it is required.

Rather than rely on driver authors getting this right, push mmiowb() into
arch_spin_unlock() for sh. If this is deemed to be a performance issue,
a subsequent optimisation could make use of ARCH_HAS_MMIOWB to elide
the barrier in cases where no I/O writes were performed inside the
critical section.

Cc: Yoshinori Sato <ysato@users.sourceforge.jp>
Cc: Rich Felker <dalias@libc.org>
Acked-by: Linus Torvalds <torvalds@linux-foundation.org>
Signed-off-by: Will Deacon <will.deacon@arm.com>
arch/sh/include/asm/Kbuild
arch/sh/include/asm/io.h
arch/sh/include/asm/mmiowb.h [new file with mode: 0644]
arch/sh/include/asm/spinlock-llsc.h

index 162c9054561f516de0704149921a2b59aea9b0b4..7bf2cb680d328462c4e621eae24005f1c9f35afc 100644 (file)
@@ -14,7 +14,6 @@ generic-y += local.h
 generic-y += local64.h
 generic-y += mcs_spinlock.h
 generic-y += mm-arch-hooks.h
-generic-y += mmiowb.h
 generic-y += parport.h
 generic-y += percpu.h
 generic-y += preempt.h
index 4f7f235f15f856775ee2fbdae67e06ad20fdc363..c28e37a344adce0e6785c0d0a9802ff1244aa719 100644 (file)
@@ -229,9 +229,6 @@ __BUILD_IOPORT_STRING(q, u64)
 
 #define IO_SPACE_LIMIT 0xffffffff
 
-/* synco on SH-4A, otherwise a nop */
-#define mmiowb()               wmb()
-
 /* We really want to try and get these to memcpy etc */
 void memcpy_fromio(void *, const volatile void __iomem *, unsigned long);
 void memcpy_toio(volatile void __iomem *, const void *, unsigned long);
diff --git a/arch/sh/include/asm/mmiowb.h b/arch/sh/include/asm/mmiowb.h
new file mode 100644 (file)
index 0000000..535d597
--- /dev/null
@@ -0,0 +1,12 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+#ifndef __ASM_SH_MMIOWB_H
+#define __ASM_SH_MMIOWB_H
+
+#include <asm/barrier.h>
+
+/* synco on SH-4A, otherwise a nop */
+#define mmiowb()                       wmb()
+
+#include <asm-generic/mmiowb.h>
+
+#endif /* __ASM_SH_MMIOWB_H */
index 786ee0fde3b010f3bae867220ec9c68d84e895e8..7fd929cd2e7a08f8d102852b23bbe754a5c6145e 100644 (file)
@@ -47,6 +47,8 @@ static inline void arch_spin_unlock(arch_spinlock_t *lock)
 {
        unsigned long tmp;
 
+       /* This could be optimised with ARCH_HAS_MMIOWB */
+       mmiowb();
        __asm__ __volatile__ (
                "mov            #1, %0 ! arch_spin_unlock       \n\t"
                "mov.l          %0, @%1                         \n\t"