]> asedeno.scripts.mit.edu Git - linux.git/commitdiff
mfd: intel-lpss: Add Intel Tiger Lake PCI IDs
authorAndy Shevchenko <andriy.shevchenko@linux.intel.com>
Thu, 1 Aug 2019 13:28:41 +0000 (16:28 +0300)
committerLee Jones <lee.jones@linaro.org>
Mon, 12 Aug 2019 10:29:04 +0000 (11:29 +0100)
Intel Tiger Lake has the same LPSS than Intel Broxton.
Add the new IDs to the list of supported devices.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
drivers/mfd/intel-lpss-pci.c

index e3a04929aaa36a061399f7f18058642d05a8a004..9355db29d2f97660056812d288163e7a5500580a 100644 (file)
@@ -258,6 +258,29 @@ static const struct pci_device_id intel_lpss_pci_ids[] = {
        { PCI_VDEVICE(INTEL, 0x9dea), (kernel_ulong_t)&cnl_i2c_info },
        { PCI_VDEVICE(INTEL, 0x9deb), (kernel_ulong_t)&cnl_i2c_info },
        { PCI_VDEVICE(INTEL, 0x9dfb), (kernel_ulong_t)&spt_info },
+       /* TGL-LP */
+       { PCI_VDEVICE(INTEL, 0xa0a8), (kernel_ulong_t)&bxt_uart_info },
+       { PCI_VDEVICE(INTEL, 0xa0a9), (kernel_ulong_t)&bxt_uart_info },
+       { PCI_VDEVICE(INTEL, 0xa0aa), (kernel_ulong_t)&spt_info },
+       { PCI_VDEVICE(INTEL, 0xa0ab), (kernel_ulong_t)&spt_info },
+       { PCI_VDEVICE(INTEL, 0xa0c5), (kernel_ulong_t)&spt_i2c_info },
+       { PCI_VDEVICE(INTEL, 0xa0c6), (kernel_ulong_t)&spt_i2c_info },
+       { PCI_VDEVICE(INTEL, 0xa0c7), (kernel_ulong_t)&bxt_uart_info },
+       { PCI_VDEVICE(INTEL, 0xa0d8), (kernel_ulong_t)&spt_i2c_info },
+       { PCI_VDEVICE(INTEL, 0xa0d9), (kernel_ulong_t)&spt_i2c_info },
+       { PCI_VDEVICE(INTEL, 0xa0da), (kernel_ulong_t)&bxt_uart_info },
+       { PCI_VDEVICE(INTEL, 0xa0db), (kernel_ulong_t)&bxt_uart_info },
+       { PCI_VDEVICE(INTEL, 0xa0dc), (kernel_ulong_t)&bxt_uart_info },
+       { PCI_VDEVICE(INTEL, 0xa0dd), (kernel_ulong_t)&bxt_uart_info },
+       { PCI_VDEVICE(INTEL, 0xa0de), (kernel_ulong_t)&spt_info },
+       { PCI_VDEVICE(INTEL, 0xa0df), (kernel_ulong_t)&spt_info },
+       { PCI_VDEVICE(INTEL, 0xa0e8), (kernel_ulong_t)&spt_i2c_info },
+       { PCI_VDEVICE(INTEL, 0xa0e9), (kernel_ulong_t)&spt_i2c_info },
+       { PCI_VDEVICE(INTEL, 0xa0ea), (kernel_ulong_t)&spt_i2c_info },
+       { PCI_VDEVICE(INTEL, 0xa0eb), (kernel_ulong_t)&spt_i2c_info },
+       { PCI_VDEVICE(INTEL, 0xa0fb), (kernel_ulong_t)&spt_info },
+       { PCI_VDEVICE(INTEL, 0xa0fd), (kernel_ulong_t)&spt_info },
+       { PCI_VDEVICE(INTEL, 0xa0fe), (kernel_ulong_t)&spt_info },
        /* SPT-H */
        { PCI_VDEVICE(INTEL, 0xa127), (kernel_ulong_t)&spt_uart_info },
        { PCI_VDEVICE(INTEL, 0xa128), (kernel_ulong_t)&spt_uart_info },