]> asedeno.scripts.mit.edu Git - linux.git/commitdiff
net: lpc-enet: move phy setup into platform code
authorArnd Bergmann <arnd@arndb.de>
Fri, 9 Aug 2019 14:40:33 +0000 (16:40 +0200)
committerArnd Bergmann <arnd@arndb.de>
Thu, 15 Aug 2019 19:33:52 +0000 (21:33 +0200)
Setting the phy mode requires touching a platform specific
register, which prevents us from building the driver without
its header files.

Move it into a separate function in arch/arm/mach/lpc32xx
to hide the core registers from the network driver.

Link: https://lore.kernel.org/r/20190809144043.476786-8-arnd@arndb.de
Acked-by: Sylvain Lemieux <slemieux.tyco@gmail.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
arch/arm/mach-lpc32xx/common.c
drivers/net/ethernet/nxp/lpc_eth.c
include/linux/soc/nxp/lpc32xx-misc.h

index f648324d5fb4b5d2c7d55d6271f3628c26577f2b..a475339333c13b1ca2b2ad5cdd09d060cc85a404 100644 (file)
@@ -63,6 +63,18 @@ u32 lpc32xx_return_iram(void __iomem **mapbase, dma_addr_t *dmaaddr)
 }
 EXPORT_SYMBOL_GPL(lpc32xx_return_iram);
 
+void lpc32xx_set_phy_interface_mode(phy_interface_t mode)
+{
+       u32 tmp = __raw_readl(LPC32XX_CLKPWR_MACCLK_CTRL);
+       tmp &= ~LPC32XX_CLKPWR_MACCTRL_PINS_MSK;
+       if (mode == PHY_INTERFACE_MODE_MII)
+               tmp |= LPC32XX_CLKPWR_MACCTRL_USE_MII_PINS;
+       else
+               tmp |= LPC32XX_CLKPWR_MACCTRL_USE_RMII_PINS;
+       __raw_writel(tmp, LPC32XX_CLKPWR_MACCLK_CTRL);
+}
+EXPORT_SYMBOL_GPL(lpc32xx_set_phy_interface_mode);
+
 static struct map_desc lpc32xx_io_desc[] __initdata = {
        {
                .virtual        = (unsigned long)IO_ADDRESS(LPC32XX_AHB0_START),
index bcdd0adcfb0c69b6dbfb5a7b37d3ba3dc3e87004..0893b77c385db7a7a7d7db07e807fc7b4a87dc84 100644 (file)
@@ -20,9 +20,6 @@
 #include <linux/spinlock.h>
 #include <linux/soc/nxp/lpc32xx-misc.h>
 
-#include <mach/hardware.h>
-#include <mach/platform.h>
-
 #define MODNAME "lpc-eth"
 #define DRV_VERSION "1.00"
 
@@ -1237,16 +1234,9 @@ static int lpc_eth_drv_probe(struct platform_device *pdev)
        dma_addr_t dma_handle;
        struct resource *res;
        int irq, ret;
-       u32 tmp;
 
        /* Setup network interface for RMII or MII mode */
-       tmp = __raw_readl(LPC32XX_CLKPWR_MACCLK_CTRL);
-       tmp &= ~LPC32XX_CLKPWR_MACCTRL_PINS_MSK;
-       if (lpc_phy_interface_mode(dev) == PHY_INTERFACE_MODE_MII)
-               tmp |= LPC32XX_CLKPWR_MACCTRL_USE_MII_PINS;
-       else
-               tmp |= LPC32XX_CLKPWR_MACCTRL_USE_RMII_PINS;
-       __raw_writel(tmp, LPC32XX_CLKPWR_MACCLK_CTRL);
+       lpc32xx_set_phy_interface_mode(lpc_phy_interface_mode(dev));
 
        /* Get platform resources */
        res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
index f232e1a1bcdc0990b73fb74f75f476c6a1650686..af4f82f6cf3b5740f1bea52d2b298ce41c76d6e9 100644 (file)
@@ -9,9 +9,11 @@
 #define __SOC_LPC32XX_MISC_H
 
 #include <linux/types.h>
+#include <linux/phy.h>
 
 #ifdef CONFIG_ARCH_LPC32XX
 extern u32 lpc32xx_return_iram(void __iomem **mapbase, dma_addr_t *dmaaddr);
+extern void lpc32xx_set_phy_interface_mode(phy_interface_t mode);
 #else
 static inline u32 lpc32xx_return_iram(void __iomem **mapbase, dma_addr_t *dmaaddr)
 {
@@ -19,6 +21,9 @@ static inline u32 lpc32xx_return_iram(void __iomem **mapbase, dma_addr_t *dmaadd
        *dmaaddr = 0;
        return 0;
 }
+static inline void lpc32xx_set_phy_interface_mode(phy_interface_t mode)
+{
+}
 #endif
 
 #endif  /* __SOC_LPC32XX_MISC_H */