]> asedeno.scripts.mit.edu Git - linux.git/commitdiff
mmc: renesas_sdhi: really fix WP logic regressions
authorWolfram Sang <wsa+renesas@sang-engineering.com>
Fri, 1 Jun 2018 11:00:37 +0000 (13:00 +0200)
committerUlf Hansson <ulf.hansson@linaro.org>
Mon, 4 Jun 2018 09:16:58 +0000 (11:16 +0200)
This reverts commit e060d376cc61 ("mmc: renesas_sdhi: fix WP detection")
and adds some code to really fix the regressions.

It was missed so far that Renesas R-Car instantiations of SDHI chose to
disable internal WP and used the existence of "wp-gpios" to en/disable
WP at all.

With the first refactoring by Yamada-san with commit 2ad1db059b9a ("mmc:
renesas_sdhi: use MMC_CAP2_NO_WRITE_PROTECT instead of TMIO own flag"),
WP was always disabled even when GPIOs were present. With Wolfram's
first fix which gets now reverted, GPIOs were honored. But when not
available, the fallback was to internal WP and not to disabled WP. This
caused wrong WP status on uSD card slots.

Restore the old behaviour now. By default, WP is disabled. When a GPIO
is found, the GPIO re-enables WP. We will think about possible better
ways to handle this in the future.

Tested on a previously regressing Renesas Lager board (H2) and a still
working Renesas Salvator-X board (M3-W).

Reported-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Cc: stable@vger.kernel.org # v4.17+
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
drivers/mmc/host/renesas_sdhi_core.c
drivers/mmc/host/renesas_sdhi_internal_dmac.c
drivers/mmc/host/renesas_sdhi_sys_dmac.c

index 51e01f03fb995f06619cb194b5319725f81ed9ec..45c015da2e757c9099aa3b4d0378ffe960ea7dcb 100644 (file)
@@ -28,6 +28,7 @@
 #include <linux/of_device.h>
 #include <linux/platform_device.h>
 #include <linux/mmc/host.h>
+#include <linux/mmc/slot-gpio.h>
 #include <linux/mfd/tmio.h>
 #include <linux/sh_dma.h>
 #include <linux/delay.h>
@@ -534,6 +535,10 @@ int renesas_sdhi_probe(struct platform_device *pdev,
        host->multi_io_quirk    = renesas_sdhi_multi_io_quirk;
        host->dma_ops           = dma_ops;
 
+       /* For some SoC, we disable internal WP. GPIO may override this */
+       if (mmc_can_gpio_ro(host->mmc))
+               mmc_data->capabilities2 &= ~MMC_CAP2_NO_WRITE_PROTECT;
+
        /* SDR speeds are only available on Gen2+ */
        if (mmc_data->flags & TMIO_MMC_MIN_RCAR2) {
                /* card_busy caused issues on r8a73a4 (pre-Gen2) CD-less SDHI */
index b6edb7a695b554f415bb6811839eda10f1855ecf..f7f9773d161f1e5e2f58ae1f9a32c800ac5f3474 100644 (file)
@@ -87,6 +87,7 @@ static const struct renesas_sdhi_of_data of_rcar_gen3_compatible = {
                          TMIO_MMC_HAVE_CBSY | TMIO_MMC_MIN_RCAR2,
        .capabilities   = MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ |
                          MMC_CAP_CMD23,
+       .capabilities2  = MMC_CAP2_NO_WRITE_PROTECT,
        .bus_shift      = 2,
        .scc_offset     = 0x1000,
        .taps           = rcar_gen3_scc_taps,
index 848e50c1638aa6088f00dce9dd832fce1fd3e4d5..4bb46c489d71f8484de857bcc4f014001271451a 100644 (file)
@@ -42,6 +42,7 @@ static const struct renesas_sdhi_of_data of_rz_compatible = {
 static const struct renesas_sdhi_of_data of_rcar_gen1_compatible = {
        .tmio_flags     = TMIO_MMC_HAS_IDLE_WAIT | TMIO_MMC_CLK_ACTUAL,
        .capabilities   = MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ,
+       .capabilities2  = MMC_CAP2_NO_WRITE_PROTECT,
 };
 
 /* Definitions for sampling clocks */
@@ -61,6 +62,7 @@ static const struct renesas_sdhi_of_data of_rcar_gen2_compatible = {
                          TMIO_MMC_HAVE_CBSY | TMIO_MMC_MIN_RCAR2,
        .capabilities   = MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ |
                          MMC_CAP_CMD23,
+       .capabilities2  = MMC_CAP2_NO_WRITE_PROTECT,
        .dma_buswidth   = DMA_SLAVE_BUSWIDTH_4_BYTES,
        .dma_rx_offset  = 0x2000,
        .scc_offset     = 0x0300,
@@ -81,6 +83,7 @@ static const struct renesas_sdhi_of_data of_rcar_gen3_compatible = {
                          TMIO_MMC_HAVE_CBSY | TMIO_MMC_MIN_RCAR2,
        .capabilities   = MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ |
                          MMC_CAP_CMD23,
+       .capabilities2  = MMC_CAP2_NO_WRITE_PROTECT,
        .bus_shift      = 2,
        .scc_offset     = 0x1000,
        .taps           = rcar_gen3_scc_taps,