]> asedeno.scripts.mit.edu Git - linux.git/commitdiff
drm/amd/display: Clear dmps off for eDP when resume.
authorYongqiang Sun <yongqiang.sun@amd.com>
Wed, 14 Feb 2018 22:12:39 +0000 (17:12 -0500)
committerAlex Deucher <alexander.deucher@amd.com>
Mon, 5 Mar 2018 20:33:43 +0000 (15:33 -0500)
This patch fixed secondary screen only S4 resume, eDP is unintentionally
light up due to incorrect dpms off flag.

When entering S4, dpms off flags are set to true via
set power state. During resume, eDP is light up by vbios, so the flags
should be changed to false to match the real state.
By change the flag properly, eDP is able to be turned off properly as per
OS request.

This change may affect S3/S4 Shut down resume IOIC, need to verify
those cases.

Signed-off-by: Yongqiang Sun <yongqiang.sun@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/display/dc/core/dc_link.c
drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c

index 556b155ba5af22e2acb21d78c559e12745cb4608..b7540152005b4eb0a751d82e1ffdf7b7f5adf2b5 100644 (file)
@@ -2297,9 +2297,13 @@ void core_link_enable_stream(
        if (pipe_ctx->stream->signal == SIGNAL_TYPE_EDP &&
                core_dc->apply_edp_fast_boot_optimization) {
                core_dc->apply_edp_fast_boot_optimization = false;
+               pipe_ctx->stream->dpms_off = false;
                return;
        }
 
+       if (pipe_ctx->stream->dpms_off)
+               return;
+
        status = enable_link(state, pipe_ctx);
 
        if (status != DC_OK) {
index 0422c72a75797e4dbdac841dec2c87404fd3a4e3..73e0bcd5ba8f1a192d8311dc8c7a264bb4904b95 100644 (file)
@@ -1320,10 +1320,8 @@ static enum dc_status apply_single_controller_ctx_to_hw(
 
        resource_build_info_frame(pipe_ctx);
        dce110_update_info_frame(pipe_ctx);
-       if (!pipe_ctx_old->stream) {
-               if (!pipe_ctx->stream->dpms_off)
-                       core_link_enable_stream(context, pipe_ctx);
-       }
+       if (!pipe_ctx_old->stream)
+               core_link_enable_stream(context, pipe_ctx);
 
        pipe_ctx->plane_res.scl_data.lb_params.alpha_en = pipe_ctx->bottom_pipe != 0;