]> asedeno.scripts.mit.edu Git - linux.git/commitdiff
drm/amd/include:cleanup vega10 nbio header files.
authorFeifei Xu <Feifei.Xu@amd.com>
Thu, 23 Nov 2017 06:54:48 +0000 (14:54 +0800)
committerAlex Deucher <alexander.deucher@amd.com>
Wed, 6 Dec 2017 17:48:21 +0000 (12:48 -0500)
Cleanup asic_reg/vega10/NBIO folder.

Signed-off-by: Feifei Xu <Feifei.Xu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/mxgpu_ai.c
drivers/gpu/drm/amd/amdgpu/nbio_v6_1.c
drivers/gpu/drm/amd/amdgpu/psp_v3_1.c
drivers/gpu/drm/amd/display/dc/dce120/dce120_resource.c
drivers/gpu/drm/amd/include/asic_reg/nbio/nbio_6_1_default.h [moved from drivers/gpu/drm/amd/include/asic_reg/vega10/NBIO/nbio_6_1_default.h with 100% similarity]
drivers/gpu/drm/amd/include/asic_reg/nbio/nbio_6_1_offset.h [moved from drivers/gpu/drm/amd/include/asic_reg/vega10/NBIO/nbio_6_1_offset.h with 100% similarity]
drivers/gpu/drm/amd/include/asic_reg/nbio/nbio_6_1_sh_mask.h [moved from drivers/gpu/drm/amd/include/asic_reg/vega10/NBIO/nbio_6_1_sh_mask.h with 100% similarity]
drivers/gpu/drm/amd/powerplay/hwmgr/vega10_inc.h

index 7405d7bb43b7ea19f22e4dd20549cc7b904d6e67..19327b78212433b45de86fde1c36244cc3edf6c5 100644 (file)
@@ -23,8 +23,8 @@
 
 #include "amdgpu.h"
 #include "vega10/soc15ip.h"
-#include "vega10/NBIO/nbio_6_1_offset.h"
-#include "vega10/NBIO/nbio_6_1_sh_mask.h"
+#include "nbio/nbio_6_1_offset.h"
+#include "nbio/nbio_6_1_sh_mask.h"
 #include "gc/gc_9_0_offset.h"
 #include "gc/gc_9_0_sh_mask.h"
 #include "soc15.h"
index 904a1bab9b9f38de35590829d742a2969e3ec979..fd9f71e8a2d26f82dd6dec536981d06d8658888a 100644 (file)
@@ -25,9 +25,9 @@
 #include "nbio_v6_1.h"
 
 #include "vega10/soc15ip.h"
-#include "vega10/NBIO/nbio_6_1_default.h"
-#include "vega10/NBIO/nbio_6_1_offset.h"
-#include "vega10/NBIO/nbio_6_1_sh_mask.h"
+#include "nbio/nbio_6_1_default.h"
+#include "nbio/nbio_6_1_offset.h"
+#include "nbio/nbio_6_1_sh_mask.h"
 #include "vega10/vega10_enum.h"
 
 #define smnCPM_CONTROL                                                                                  0x11180460
index ff93070e3bf0bbe5800ed6f7730a31f1b435d005..7a9832b8ff512c5a9cb4489414a4f42c70e42c4b 100644 (file)
@@ -36,7 +36,7 @@
 #include "mp/mp_9_0_sh_mask.h"
 #include "gc/gc_9_0_offset.h"
 #include "sdma0/sdma0_4_0_offset.h"
-#include "vega10/NBIO/nbio_6_1_offset.h"
+#include "nbio/nbio_6_1_offset.h"
 
 MODULE_FIRMWARE("amdgpu/vega10_sos.bin");
 MODULE_FIRMWARE("amdgpu/vega10_asd.bin");
index e59a4e6d6a554f325ff69d318e03c42208e885c1..9d64e669ba52a3ca5e7eb416b992721abc018b86 100644 (file)
@@ -57,7 +57,7 @@
 #include "dce/dce_12_0_offset.h"
 #include "dce/dce_12_0_sh_mask.h"
 #include "vega10/soc15ip.h"
-#include "vega10/NBIO/nbio_6_1_offset.h"
+#include "nbio/nbio_6_1_offset.h"
 #include "reg_helper.h"
 
 #include "dce100/dce100_resource.h"
index 4aec8f2415e843e6e5946e1d287327f332dd9552..faf7ac044348b1280b271d329a71af92c752d5ee 100644 (file)
@@ -35,9 +35,9 @@
 #include "asic_reg/gc/gc_9_0_offset.h"
 #include "asic_reg/gc/gc_9_0_sh_mask.h"
 
-#include "asic_reg/vega10/NBIO/nbio_6_1_default.h"
-#include "asic_reg/vega10/NBIO/nbio_6_1_offset.h"
-#include "asic_reg/vega10/NBIO/nbio_6_1_sh_mask.h"
+#include "asic_reg/nbio/nbio_6_1_default.h"
+#include "asic_reg/nbio/nbio_6_1_offset.h"
+#include "asic_reg/nbio/nbio_6_1_sh_mask.h"
 
 
 #endif