arm64: dts: mt2712: add pintcrl device node.

This patch adds pintcrl device node for mt2712.

Signed-off-by: Zhiyong Tao <zhiyong.tao@mediatek.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>

diff --git a/arch/arm64/boot/dts/mediatek/mt2712e.dtsi b/arch/arm64/boot/dts/mediatek/mt2712e.dtsi
index 23f22249ecc17d0cf977ae2c40c31f0d804f1771..6d8532af834688d96e1bdb7394c3d2821da393e4 100644 (file)
--- a/arch/arm64/boot/dts/mediatek/mt2712e.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt2712e.dtsi
@@ -9,6 +9,7 @@
 #include <dt-bindings/interrupt-controller/irq.h>
 #include <dt-bindings/interrupt-controller/arm-gic.h>
 #include <dt-bindings/power/mt2712-power.h>
+#include "mt2712-pinfunc.h"
 
 / {
        compatible = "mediatek,mt2712";
@@ -258,6 +259,23 @@ pericfg: syscon@10003000 {
                #clock-cells = <1>;
        };
 
+       syscfg_pctl_a: syscfg_pctl_a@10005000 {
+               compatible = "mediatek,mt2712-pctl-a-syscfg", "syscon";
+               reg = <0 0x10005000 0 0x1000>;
+       };
+
+       pio: pinctrl@10005000 {
+               compatible = "mediatek,mt2712-pinctrl";
+               reg = <0 0x1000b000 0 0x1000>;
+               mediatek,pctl-regmap = <&syscfg_pctl_a>;
+               pins-are-numbered;
+               gpio-controller;
+               #gpio-cells = <2>;
+               interrupt-controller;
+               #interrupt-cells = <2>;
+               interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
+       };
+
        scpsys: scpsys@10006000 {
                compatible = "mediatek,mt2712-scpsys", "syscon";
                #power-domain-cells = <1>;