]> asedeno.scripts.mit.edu Git - linux.git/commitdiff
arm64: dts: renesas: r8a77990: Attach the SYS-DMAC to the IPMMU
authorMagnus Damm <damm@opensource.se>
Mon, 17 Sep 2018 08:19:49 +0000 (17:19 +0900)
committerSimon Horman <horms+renesas@verge.net.au>
Wed, 19 Sep 2018 08:15:05 +0000 (10:15 +0200)
For R-Car E3 hook up SYS-DMAC0, SYS-DMAC1 and SYS-DMAC2 to
IPMMU-DS0 and IPMMU-DS1 in same way as for R-Car H3.
This follows the R-Car Gen3 Rev.1.00 (April 2018) datasheet.

Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
arch/arm64/boot/dts/renesas/r8a77990.dtsi

index 5ce268cda03bf7811db64ebfb657d579f1e3bc3c..2cb5c19b8a7c2a44080b6ba753700e7104da7ebd 100644 (file)
@@ -373,6 +373,14 @@ GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH
                        resets = <&cpg 219>;
                        #dma-cells = <1>;
                        dma-channels = <16>;
+                       iommus = <&ipmmu_ds0 0>, <&ipmmu_ds0 1>,
+                              <&ipmmu_ds0 2>, <&ipmmu_ds0 3>,
+                              <&ipmmu_ds0 4>, <&ipmmu_ds0 5>,
+                              <&ipmmu_ds0 6>, <&ipmmu_ds0 7>,
+                              <&ipmmu_ds0 8>, <&ipmmu_ds0 9>,
+                              <&ipmmu_ds0 10>, <&ipmmu_ds0 11>,
+                              <&ipmmu_ds0 12>, <&ipmmu_ds0 13>,
+                              <&ipmmu_ds0 14>, <&ipmmu_ds0 15>;
                };
 
                dmac1: dma-controller@e7300000 {
@@ -407,6 +415,14 @@ GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH
                        resets = <&cpg 218>;
                        #dma-cells = <1>;
                        dma-channels = <16>;
+                       iommus = <&ipmmu_ds1 0>, <&ipmmu_ds1 1>,
+                              <&ipmmu_ds1 2>, <&ipmmu_ds1 3>,
+                              <&ipmmu_ds1 4>, <&ipmmu_ds1 5>,
+                              <&ipmmu_ds1 6>, <&ipmmu_ds1 7>,
+                              <&ipmmu_ds1 8>, <&ipmmu_ds1 9>,
+                              <&ipmmu_ds1 10>, <&ipmmu_ds1 11>,
+                              <&ipmmu_ds1 12>, <&ipmmu_ds1 13>,
+                              <&ipmmu_ds1 14>, <&ipmmu_ds1 15>;
                };
 
                dmac2: dma-controller@e7310000 {
@@ -441,6 +457,14 @@ GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH
                        resets = <&cpg 217>;
                        #dma-cells = <1>;
                        dma-channels = <16>;
+                       iommus = <&ipmmu_ds1 16>, <&ipmmu_ds1 17>,
+                              <&ipmmu_ds1 18>, <&ipmmu_ds1 19>,
+                              <&ipmmu_ds1 20>, <&ipmmu_ds1 21>,
+                              <&ipmmu_ds1 22>, <&ipmmu_ds1 23>,
+                              <&ipmmu_ds1 24>, <&ipmmu_ds1 25>,
+                              <&ipmmu_ds1 26>, <&ipmmu_ds1 27>,
+                              <&ipmmu_ds1 28>, <&ipmmu_ds1 29>,
+                              <&ipmmu_ds1 30>, <&ipmmu_ds1 31>;
                };
 
                ipmmu_ds0: mmu@e6740000 {