mtd: spi-nor: clear Winbond Extended Address Reg on switch to 3-byte addressing.

Winbond spi-nor flash 32MB and larger have an 'Extended Address
Register' as one option for addressing beyond 16MB (Macronix
has the same concept, Spansion has EXTADD bits in the Bank Address
Register).

According to section
   8.2.7 Write Extended Address Register (C5h)

of the Winbond W25Q256FV data sheet (256M-BIT SPI flash)

   The Extended Address Register is only effective when the device is
   in the 3-Byte Address Mode.  When the device operates in the 4-Byte
   Address Mode (ADS=1), any command with address input of A31-A24
   will replace the Extended Address Register values. It is
   recommended to check and update the Extended Address Register if
   necessary when the device is switched from 4-Byte to 3-Byte Address
   Mode.

So the documentation suggests clearing the EAR after switching to
3-byte mode.  Experimentation shows that the EAR is *always* one after
the switch to 3-byte mode, so clearing the EAR is mandatory at
shutdown for a subsequent 3-byte-addressed reboot to work.

Note that some SOCs (e.g. MT7621) do not assert a reset line at normal
reboot, so we cannot rely on hardware reset.  The MT7621 does assert a
reset line at watchdog-reset.

Acked-by: Marek Vasut <marek.vasut@gmail.com>
Signed-off-by: NeilBrown <neil@brown.name>
Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>

diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c
index 9363f299e4eefc0844b94c0b7c93728fb5c12f0f..494b7a269872c0ff4d41bb893271f4aee4d158b5 100644 (file)
--- a/drivers/mtd/spi-nor/spi-nor.c
+++ b/drivers/mtd/spi-nor/spi-nor.c
@@ -284,6 +284,20 @@ static inline int set_4byte(struct spi_nor *nor, const struct flash_info *info,
                if (need_wren)
                        write_disable(nor);
 
+               if (!status && !enable &&
+                   JEDEC_MFR(info) == SNOR_MFR_WINBOND) {
+                       /*
+                        * On Winbond W25Q256FV, leaving 4byte mode causes
+                        * the Extended Address Register to be set to 1, so all
+                        * 3-byte-address reads come from the second 16M.
+                        * We must clear the register to enable normal behavior.
+                        */
+                       write_enable(nor);
+                       nor->cmd_buf[0] = 0;
+                       nor->write_reg(nor, SPINOR_OP_WREAR, nor->cmd_buf, 1);
+                       write_disable(nor);
+               }
+
                return status;
        default:
                /* Spansion style */

diff --git a/include/linux/mtd/spi-nor.h b/include/linux/mtd/spi-nor.h
index de36969eb3597b1b6290fecd6985f05dfa7cf4d8..e60da0d34cc14794529f2f79dcabf3ca250839d6 100644 (file)
--- a/include/linux/mtd/spi-nor.h
+++ b/include/linux/mtd/spi-nor.h
@@ -62,6 +62,8 @@
 #define SPINOR_OP_RDCR         0x35    /* Read configuration register */
 #define SPINOR_OP_RDFSR                0x70    /* Read flag status register */
 #define SPINOR_OP_CLFSR                0x50    /* Clear flag status register */
+#define SPINOR_OP_RDEAR                0xc8    /* Read Extended Address Register */
+#define SPINOR_OP_WREAR                0xc5    /* Write Extended Address Register */
 
 /* 4-byte address opcodes - used on Spansion and some Macronix flashes. */
 #define SPINOR_OP_READ_4B      0x13    /* Read data bytes (low frequency) */